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Full text of "Alteration of the CP/M-86 operating system."

ALTERATION OF THE CP/M-86 
OPERATING SYSTEM 



Michael Bruno Candalor 



I 



NAVAL POSTGRADUATE SCHOOL 

Monterey, California 




THESIS 



ALTERATION OF THE CP/M-86 OPERATING SYSTEM 

by 
Michael Bruno Candalor 

June 1981 



Thesis Advisor: 



U. R. Kodres 



Approved for public release; distribution unlimited 



T 1998 



SECURITY CLASSIFICATION OF THIS »tCC fWtmm Omm emwwt) 

REPORT DOCUMENTATION PAGE 



READ INSTRUCTIONS 
BEFORE COMPLETING FORM 



2. OOVT ACCESSION MO 



1. «Cl»1lMT'$ CATALOG NUMIC* 



4 TITLE i«n* Iu»»li;.) 

Alteration of the CP/M-86 Operating System 



s. type of report * period covered 

Master's Thesis: 
June 1981 



s. performing one. report numur 



7. AuTHORfaj 

Michael Bruno Candalor 



I. CONTRACT OR GRANT NUMlCRft) 



» PERFORMING ORGANIZATION NAME AMD AOORESS 

Naval Postgraduate School 
Monterey, California 9 3940 



10. MOORAM ELCMCNT. MOJECT. TASK 
ARIA * WORK UNIT NUMHRt 



M CONTROLLING OFFICE NAME ANO AOORESS 

Naval Postgraduate School 
Monterey, California 9 3940 



12. REPORT OATE 

June 1981 



IS. NUMBER OF PAGES 

96 



14 MONITORING AGENCY NAME * AOONESS/lf tttltmtmti 



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SCMEOULE 



IS. DISTRIBUTION STATEMENT (ol (hit mmpmrt} 

Approved for public release; distribution unlimited 



17. OISTRIRUTION STATEMENT (at •*« •Aatract amtormal In Block 20. It Mlloronl Imam Hmpar t ) 



IS. SUPPLEMENTARY NOTES 



IS. KEY *ORD8 (Coniltmto w rmwormm ••«• ll naeaa*owr mm* imantirr *r mime* mtmmmtj 

8086 Processor, operating system, microcomputer, BIOS interface, CP/M-86 



20. ABSTRACT (Contlmtm an rororoo *iOo II MCMMT ON* l*m»ntv *r mt—M tmumamo*) 

CP/M-86 is a microcomputer (INTEL 8086) operating system developed and 
marketed by Digital Research. The operating system is designed so that a user 
can adapt the system to his own input/output hardware devices. This thesis 
develops interfaces to two floppy disk controllers, the iSBC 201 (single density) 
and the iSBC 202 (double density) controllers. The interface includes the 
writing of a boot loader embedded in the iSBC957 Execution Vehicle Monitor, the 
monitor system for the INTEL iSBC 86/12 single board computer. Also included is 



DD , :S" 7 , 1473 
(Page 1) 



EDITION OF I NOV «S is OBSOLETE 

S/N a 107-0 14- AA01 : 



SECURITY CLASSIFICATION OF THIS PAGE (Whrnti Dmlm tnlotod) 



)WT< C^.AHI»lCtTl»«l Og TIM* »»««<T»— rwt» Ja 



n interface module for the cold start loader (loader BIOS). A design for the 
aterface module of typical systems based on Winchester technology hard disks 
s also presented. 



, Form 1473 

1 Jan YD 2 

N 0102-014-6601 iteuiMvv cTIuuMcTriotii o? rmt mZntfmZZ om t«««<^i 



Approved for public release; distribution unlimited 



Alteration of tHe CP/M-B6 Operating Systet 



cy 



Micnael Bruno Canlalor 
Lieutenant Commander, United States Navy 
B.S.M.E., United States Naval Academy, 1972 



Submitted in partial fulfillment of tne 
requirements for tne degree of 



FASTER OF SCIENCE IN COMPUTER SCIENCE 



from tne 



NAVAL POSTGRADUATE SCHOOL 
June 1981 



ABSTRACT 



QP/M_cg i S a microcomputer (INTEL 8056) operating system 
developed and marketed by Digital Researcn. Tne operating 
system is designed so tnat a user ran adapt tne system to 
nis own input/output nardware devices. This tresis develops 
interfaces to two floppy disx controllers, tne iS3C 2P1 
(single densitv) and tne iSBC 2 i l2 (double density) 
controllers. Tie interface includes tne writing of a boot 
loader embedded in tne iSBC 957 Execution Venicle Monitor, 
tne monitor system for tne INTEL iSEC 86/12 single board 
computer. Also included is an interface module for tne cold 
start loader (loader 3I0S) ana an input and output 
interface, BIOS. A design for tne interface module of 
typical systems based on Winchester tecnnology nard disxs is 
also presented. 



TA.BLE OF CONTENTS 

I. INTRODUCTION 10 

A. PURPOSE OF THIS THESIS 10 

3. HISTORY OF MICROCOMPUTER OPERATING SYSTEMS 10 

C. ADAPTATION TO THE USER'S ENVIRONMENT 13 

D. ORGANIZATION OF THIS THESIS 13 

II. STRUCTURE OF CP/M-66 15 

A. OVERVIEW 15 

3. ORGANIZATION OF CP/M-86 Id 

C. CCP BUILT-IN AND TRANSIENT COMMANDS 17 

1. Transient Program Execution Models 19 

a. Tne S080 Model 19 

b. The Small Model 20 

c. Tne Compact Model 21 

2. Transient Program Setup and Termination . . .22 

D. BDOS Summary 23 

E. BIOS Summary 2^ 

III. INPUT /OUTPUT DEVICES 27 

A. LOGICAL I/O DEVICES 27 

B. PHYSICAL I/O DEVICES 27 

C. DISK DEVICES 2S 

1. Hard Disirs, Floppy Disirs 28 

2. Organization of Data HS 



3. Interfaces tc tne Computer 29 

4. Examples of Particular Controllers 31 

a. iSBC 201 (Single Density i^DS ) 31 

(1) iSBC 201 Controller Operation. .. .31 

(2) BIOS Use of tne iSBC 201 34 

(3) .Bootstrap Use of tne iSBC 201. ...35 

b. iSBC 202 (Double Density MDS) 35 

(1) 1S.BC 202 Controller Operation. .. .35 

(2) BIOS Use of tne iSBC 202 36 

(3) Bootstrap Use of tne iSBC 202. ...36 
C. REMEX RDW 3200 3b 

(1) Tne RDW Controller 3? 

(2) BIOS Use of tne RDW 3200 39 

(3) Bootstrap Use of tne RDW 3200. ...4:0 

IV. ALTERATION OF CP/M-86 4:1 

A. CHAN3ES REQUIRED TO IMPLEMENT CP/M-e6 41 

3. DISK PARAMETER TABLES 42 

C. COLD START 44 

1. Tne Coll Start Loader 44 

2. Tne Bootstrap ROM 45 

V. CONCLUSIONS AND RECOMMENDATIONS 4? 

A. ADAPTATION DIFFICULTY 4? 

B. RECOMMENDATIONS FOR FUTURE HARD DISK ADDITION. 49 

1. Discussion 49 

2. Template for Adaptation 49 

APPENDIX A - SING-LE DENSITY BIOS LISTING- 52 

6 



APPENDIX h - DOUBLE DENSITY BIOS LISTING 63 

APPENDIX C - BOOTSTRAP PROGRA M LISTING 74 

APPENDIX D - DISTRIBUTION BIOS PROGRAM LISTING =1 

LIST Or REFERENCES 95 

INITIAL DISTRIBUTION LIST 96 



LIST OF FIGURES 

1 Transient Program ^emory Models 19 

2 The 8060 Memory Model 2£ 

3 Tne Small ^emory M oael 21 

4 Tne Compact Memory Model 22 

5 Menory Location of tne BIOS 25 

d BIOS Distr Definition File 43 

7 DISOEF Statement Format 43 



8 



LIST OF TABLES 



1 BDOS Parameter Conventions k:4 



I . INTRODUCTION 

A. PURPOSE OF THIS THESIS 

Tne adaptation of CP/M-£6 to tne nardware described 
Herein was undertaken to provide an operating systen for 
b£S6 processor based single board computers at tne Naval 
Postgraduate Scnooi. Tnis operating system will support 
software development and system emulation for tne AEGIS 
modeling project. Tne software will be available for general 
use at NPS. In addition tne experience of modifying an 
operating system provided tne autnor witn an opportunity to 
learn about microcomputer Hardware and microcomouter 
operating svstems . 

3. HISTORY OF MICROCOMPUTER OPERATING SYSTEMS 

Tnis is a brief overview of tne nistory of microcomputer 
operating systems summarized from Ref . 1. It is necessarily 
brief as tne advent of microcomputer operating systems is 
itself ratner recent. Microcomputers came of a?e witn trie 
construction of tne entire central processor on one cnip, 
tne replacement of core memory witn inexpensive mass 
produced semiconductor memory, tne availability of tne 
floppy diss and tne standardization of disxett a format. At 
first, tne primary applications of microcomputers were in 
real-time control systems sucn as macnine controlled tools. 
In sucn applications, process management is tne main tnrust 



12 



and system I/O is negligible. Tnis required a simple, 
customized operating syster. Tr.e first microcomputer 
operating systems, more properly caller executive systems, 
were for real time applications. As microcomputer systems 
Became less expensive, it became nossible to devote a system 
to a single user as a program development tool. Tr.is use 
presented tne need for nigner level language support, wnicn 
meant that an operating system nad to interface one or more 
programming ianguage(s) to tne nardware. Several 
microcomputer manufacturers nave produced tneir own 
operating systems. Tnese operating systems are specifically 
designed for a "computer system" and are generally not user 
configurable . 

Unli&e tne large, powerful operating systems found in 
mainframe ani large minicomputer timesharing systems, 
microcomputer operating systems are relatively austere and 
simple. One of tne primary reasons for tnis difference is 
that a microcomputer is usually a single user system (witn 
some exceptions). As a result, tne operating system does not 
need to provile features sucn as memory protection, process 
scnedulin? and time snaring of tne CPU(s). .Besides tne 
simpler interface required of a microcomputer operating 
system, tne operating system and tne applications programs 
must function in a small amount of primary storage, 
typically between lbK and b-irC, as compared to several 
megabytes in tne large mainframes. Evsn tnougn relatively 



11 



small and simple, a microcomputer operating systerr must 
still provide file management, process management and I/O 
management. 

Two representative microcomputer operating systems are 
INTEL'S ISIS-II and Digital Researcn's CP/M-S0. To operate 
under IS I is, tne user requires a minimum of 32K of primary 
storage. Tne CP/m" user requires a minimum of 16K. Botn 
orovide tne basic functions required of an operating system. 
ISIS, nowever, will only run on an INTEL computer system 
configuration and is not user modifyable. CP/"i-£i<? is 
designed to run on any 8080 or Z-Btf based microcomputer 
system after tne user nas modified tne program module 
containing tne naraware dependencies. Tnis factor alone 
mates CP/*! pouular and nas resulted, in tne production of 
many CP/M compatible utility and application programs by 
otner companies. I5IS nas some features beyond tnose of CP/M 
in tne area of deveioDTient software for INTEL naruware. 
CP/^'s dynamic debU2<?er (DDT), nowever, is more powerful and 
easier to use tnan INTEL'S ICE system. Botn ISIS and CP/M 
support essentially tne same file operations. Currently, 
because of its flexibility, C?/^ is tne most widely used 
microcomputer operating system. 

Multi-user systens sucn as M P/!* and microcomputer 
networK systems sucn as CP/NET (botn produced ny Digital 
Researcn), are now avaiiaoie. 



I'd 



C. ADAPTATION TO THE USER'S ENVIRONMENT 

Digital Researcn Has attempted to maxe tr.eir CP/^ 
operating systems as flexible, in terms of narawars suite, 
as possible. Tne rretnod used is modular programming. Tne 
user interface, tne Console Command Processor (C7P) nas no 
Hardware iependencies otner tr.an tne CPU. Tne file 
management system, tne Basic Diss Operating System (SDOS), 
is also independent of Hardware. 3otn tne CCP and tre -BDCS 
are interfaced to tne Basic Input/Output System (3I0S) 
tnrougn logical I/O devices and logical diss devices. T h .e 
BIOS, tnen, contains tne logical device to pnysical device 
translation routines. Adaptation of tne operating system to 
a unique environment requires only tne modification of tne 
appropriate BIOS routines, greatly simplifying tne 
alteration process. 

Onre one nas successfully completed one adaptation, 
follow-on adaptations will oe mucn easier to acnieve as an 
understanding of tne operating system and its interface 
procedures is ieveiopei aion^- witn a Detter understanding of 
microcomputer architecture in general. 

B. ORGANIZATION OF THIS THESIS 

Tnis tnesis is organized as a cluepnnt for alteration 
of tne CP/M-d5 operating system to any specific Hardware 
configuration. Tnis metnodoiogy win also serve, at least in 
general, for tne alteration of any operating 



13 



system-to-hardware interface. Cnapter 1 is a brief 
introduction to microcomputer operating systems in general 
and tne modification of tne CP/M-b6 operating system in 
oarticuiar. Cnapter 2 reflects the investigation or tne 
candidate operating system in oraer to understand now to 
alapt it to tne existing hardware. Chapter «i is a summary of 
tne study of tne typical floppy diss or Wincnester 
technology diss ana a loos at possible nardware candidates. 
Cnapter 4 covers the adaptation of tne I/O interface module 
(BIOS) and tne bootstrap program for these versions of the 
operating system. Cnapter 5 discusses some of tne 
difficulties encountered and a plan for adapting CP/^-bb to 
a nard diss. Tne appendices contain tne programs developed 
as part of thesis and one of tne programs whicn was used as 
a iiodel. 



14 



II. STRUCTURE OF CP/"-3S 

a. OVERVIEW 

CP/^-So is a microcomputer operating system for INTEL 
CORPORATION'S 3^36 processor tasea microcomputers. Ii is trie 
Iceical successor to CP/ v -3£, a similar operating- system 
developed and marketed by Digital Researcn for tne INTEL 
82B2 processor. File "ompat ibili ty nas oeen preservei with 
ail previous versions of CP/*!. CP/ M provides a general 
environment for pro? ram construction, storage, eiitin?, 
execution and debugging. Tne file structure of version 2 of 
CP/M-B0 is used, allowing as many as sixteen drives witn up 
to eignt megabytes on eacn drive. 

CP/M-Sb offers built-in utility commands, system 
transient commands and tne capability of executing user 
defined transient commanis (programs). Among tne system 
transient programs are an Intel compatible assemnier (ASMB6) 
and a dynamic nacnine lansua.ee program debugger (DDT). They 
are described in detail in Digital Research's publications 
[Ref. 2] and l?.ef. £j respectively. 

A powerful feature of CP/M is its modularity. One of tne 
three Tiodules of tne operating system, the 3asic I/O System 
(BIOS), defines tne nardware environment for tne system. As 
a result of this modularity, CP/M-65 can be modified to run 
on any 80B6/30B3 processor based, single processor computer 



15 



system by merely changing trie BIOS. A mor^ detailed 
description of CP/M and its features is contained in Digital 
Research's publications [Ref. 4], [Ref. 5J and L ?. e f . bj . 

3. ORGANIZATION OF CP/ M -3b 

The sources of CP/.^-bb information for tnis paper are 
[Ref. 4J , [Ref. 5 J and [Ref. 6] . Tnis cnapter freely 
summarizes tne relevant material to tnis thesis. 

Tne operating system is containei in file "CPM.SYS". 
"CPM.STS" contains tnree program modules: tne Console 
Command Processor (CCP), tne Basic Diss Operating System 
(BDOS), and tne user-configurable Basic Input/Output System 
(BIOS). Tnis modularity allows tne CCP and EDOS to ce 
independent of tne hardware in wnicn the system is 
implemented . 

The CCP is tne system's interface to tne user's console. 
It translates tne user's commands into CP/M system calls in 
order to carry out tne desired action. Tne BDOS mocuie 
provides ail tne list and file management. Tne BIOS contains 
all tne nardware dependent features and interfaces. Tne 
operating system executes in any portion of memory above tne 
interrupt locations, wnile tne remainder of tne address 
space is partitioned into as many as eigttt non-contiguous 
regions, as defined in a table in tne EIOS. 

CP/M-B6 is too large a program to fit in tne first two 
(system) traces of a diskette. As a result tne boot loader 



lb 



loads into memory a coli start loader, called LOADER. CMC , 
from trie first two tracts. The soot loader rases the 
appropriate initializations ana tften transfers program 
control to tne cold start loader. Tne cold start lcaoer, 
wnicn is essentially a subset of "CPM.SYS", finds "CP M .SYS" 
on tne system lisic, loads it into memory, maies tne proper 
initializations, and finally transfers control to tne 
operating system. 

C. CCP £ r JILT-IN & TRANSIENT COMMANDS 

The operation of CP/M-B6 is similar to tnat of CP/M-ee. 
Upon cold start tne operating systen si?ns on and drive A is 
logged-in, CP/M-B6 men waits for an input command line. 
There are rive built in commands: 

DIR - displays tne directory of tne designated drive 

ERA - erases tne specified directory entry on tne 
designated drive 

REN - renames tne designated file 

TTPE - tyoes tne designated rile to tne iosical console 
device 

USSR - cnanges user directories in multi-directory 

systems 
Also tne command line nav begin witn tne name of a 

transient program witn tne assumed file type of CMC. CMD 
stands for "command file" and is used to differentiate 
CP/M-6S transient command files from COM files under CP/M-S0 



17 



tfnicn serve trie same purpose. Transient programs are loaaed 
into memory in tne Transient Program Area(s) (TPA), as 
defined in tne EI OS, in stac* oner. 

CP/^-Bb supports programs written in tnree memory 
models: tne B090 model, tne Small model and tne Compact 
model . 

Tne 60Bfc) model supports programs wnicr. are directly 
translated from CP/^-Btf ween code and aata areas are 
intermixed. Tne model consists only of a code ^roup wnicn, 
in turn, is normally a single segment of 64K or less. Tne 
operating system and tne ~old start loader are written in 
tne 8i4S0 model. 

Tne Small model supports programs wnere tnere is a 
separate code and data group. Normally tne S^ali model 

programs are 642 or less. 

Tne Compact model occurs ahen any of tne extra, stacK or 
auxiliary groups are present in tne program. Eacn group may 
consist of one or more segments. 

Tne tnree models differ primarily in tne manner in wnicn 
tne segment registers are initialized upon transient program 
loading. Tne operating system's pros-ram loaa function 
determines tne memory Tiocel used by tne transient urogram by 
examining 1 tne program group used. All tnree models are 
discussed in more detail in tne next section. 



lb 



l. Transient Program Execution Models 

Trie initial values of tne segment registers ere 

det°rmined by tne "memory model" of trie transient program 
and are described in tne CMD file neader generated try tne 
program "GENC M B.Cr- 1 D" cr "GEtN CMD.COM". Tne tnree nocels are 
depicted in Fieure 1. 



! 8080 Model ! Code and Data Groups Overlap ! 
! Small v odei ! Independent Code S L*ata Groups ! 
! Compact Model ! Tnree or lore Independent Groups ! 



Figure 1 Transient Program Memory y odeis. 

a. Tne 8080 Model 

Tne 308Z Model is assumed, wnen tne transient 
program contains only a code ?roup (containing Dotn rode and 



via. 



ta) . 



in 



ucn cases, tne CS, DS and ES registers are ail 



initialized to tne Dee-inning of tne "Ode ?roup, wnii Q tne SS 
ani SP registers remain set to a 96-cyte stacx area in me 
CCF. Tne Instruction Pointer (IP) is set to 100H, similar to 
CP/M-80. Tne intermixed. coae and lata regions are 
indistinguisnaoie . Tnis model allows simple translation of 
8080, 80BS and Z80 coie into tne 8086 and be 88 environment. 
Following program load, tne 8080 v cdei appears as in Figure 
'd, wnere low addresses are snown at tne top of tne diagram. 



19 




3 5 ■«■ S P : 
CS , DS , SS : 

cs + eeefcE 



base 

page 



CS + 01&50H: ! it 5 = fe31!^0H ! 

! cede ! 



! i a i a ! 


• • ■ 


j 


code 


T 


? 


data 


? 



Figure 2 Tne B080 Memory Model. 

b. Tne Snail Model 

Ttie Small Model is assumed wnen tne transient 
progra-n uses coin a coae and data -roup. (In ASMB5, ail code 
is venerated following a CSSG directive, while data is 
defined t'oliowing a DSSG directive.) In tnis case CS is set 
to tne ce^innin^ of the code ?roup, the DS and 3S re^iste^s 
are set to tne start of tne data group, and tne SS ana SP 
registers remain in tne CC?'5 area as shown graphically in 
figure 3. 



2Q 



s • 



CCP 



! StacK ! 



SS + SP: 



DS, ES : 



DS + 0100H: 




Figure 3 T.ne Small Memory Model. 

c. Tne Compact Modei 

Tne Compact Model is assume! wnen separate code 
and data eroups are present, along witn one or more of tne 
remaining groups. In tnis case, tne CS , DS and SS registers 
are initialize! to tne base address of tneir respective 
areas. Tne SS ana SP registers remain in tne CCP area. If 
tne user inter.is to use tne stacK group as a staci area, tne 
transient program must set tne SS an! SP registers upon 
entry. Tne initial configuration of tne segment registers in 
tnis moiei is snown in Figure 4. 



21 



S S : 



cc? 



! Stactf 



SS + SP 
CS 



DS 

D£ + 01ZFH 
ES 



! 




? 


J 


I? 


= 0000i? ! 


1 




cole ! 


I 






f 




Dase ! 


J 




page ! 


J 






f 




lata ! 


J 






I 






J 




lata ! 


! 







Figure 4 Tne Compact memory i*odei. 

The values of tne various segment registers can 
oe progranmatical ly cnanged during execution oy cnanging tne 

values in tne Dase page as described in tne preliminary 
documentation, tnus allowing access to tne entire memory 
space. 

2, Transient Program Setup Ann Termination 

Similar to CP/M-80, tne CCP parses up to two file 
names following tne command and places tne properly 
formatted File Control 3ioc£s (FCB's) at locations 0005CH 
and 006CK in tne Dase page relative to tne DS register. 
Under CP/^-SfeJ, tne lefault DMA (direct memory access) 

22 



address is initialized to 8080H in trie Dase page. Due to tne 
segmented memory or the bfc?b6 and 6£Sb processors, tne DMA 
address is divided into two parts: tne DMA segment address 
and tne DMA offset. Also, under CP/M-86 , tne default E^A 
Dase is set to tne value of DS , and tne default DMA offset 
is initialized to 0080E. Tnus, CP/ v -fce ana CP/M-G6 operate 
in tne sane way in tnat tney botn assume tne default DMA 
address is tne second naif of tne base paee . 

Tne CCP transfers control to tne transient program 



tnrougn an Bus5 Far Call. In all but one case 



tne 



Compact lode l f the transient pros-ram may cnoose to use tne 
96-byte CCP stacs, and optionally return directly to tne CCP 



upon program termination by executin? a 



Ta r. 



Re turn . 



Programmatic termination also occurs wnen 30OS function zero 
is executed. The operator may terminate program execution by 
typing a single CONTROL-C during line edited input. Tnis has 
the same effect as programmatic execution or BDOS function 
zero. Contrary to tne operation of CP/M-30, no dis£ reset 

occurs and the CCP and BDOS modules are not reloaded from 

tne dist upon program termination. In snort, for tne user 

familiar with CP/M-60, the CP/M-86 environment is very 
similar, but more powerful. 

D. BDOS SUMMARY 

Entry into tne BDOS is made tnrougn tne b£b5 software 
interrupt * 224:. The SDOS is, essentially, a set of 59 



23 



functions of tnree oasic types; simple functions, file 
operations ani extended operations. Tne interface convention 
for BDOS calls requires tnat function code oe passed in 
register CL witn parameters passed in register Dl cr EX 
depending on wnetner it is a syte or word value. Syte values 
are returned in tr.e AL register and word values in registers 
\l and BX. Taole 1 osiow, fron Reference 5, summarizes tnese 
conventions. A. full description or eacn BDOS function is 
<?iven in [Ref .6 J . 



! BDOS ilntry Registers ! ! BDOS Return riee-isters ! 



CX Function Code 

DL Byte parameter 

DX tford Parameter 

DS Data Segment 



AL Byte Value ! 

AX 'Kori Value ! 

EX Word Value ! 

BX Double fiord. Offset ' 

ES Segment Address ! 



TaDle 1 BDOS Parameter Conventions. 

E. BIOS SUMMARY 

Tne BIOS is loaded into memory just above tne CCP and 
BDOS modules as illustrated in Figure 5. 

Since tne BIOS may te configured by tne user, it may 
vary somewnat in lengtn. Individual routines witnin tne BIOS 
may be at different memory locations. In order to 
standardize tne interface to tne BIOS, all accesses to tne 
BIOS are -nade tnrougn tne jump vector at tne beginning of 
tnat module. Tne BIOS, liice tne BDOS, also nas sarameter 



v>£ 



:s, DS , £S, SS: 



Console 
Command 

Processor 

and 

Eabic 
Di ss 

Operating 

System 



BIOS : 



CS + 2500H:! BIOS Jump Vector 

CS + 253FH: 

BIOS Entry Points 



Diss 

Parameter 

Taoies' 



Uninitialized 
Scratch xam 



Figure 5 Memory Location of the PICS. 

passing conventions. Parameters for routines in tne 3ICS are 
passed in tne CI res-ister and tne IX register when required. 
3yte values are returned in tne EL register and word values 
in EX. 

Tnere are tnree major types of routines in tne EIOS: 
system initialization/reinitialization, simple character I/O 
and diss I/O. All simple character I/O operations are 
assumed to be in ASCII, Dotn upper and lower case, with tre 
nign order (parity) bit set to zero. CP/M sees all 
peripheral devices as "logical" devices. Translation from 
logical device selection to pnysical aevice assignment is 



25 



aocomulisned in tfte PICS, t&us isolating 1 me CCF and 3D0S 
from narnware dependencies. BIOS routine entry is explained 
in Digital Researcn's publication [Ref. 5j . Tr.e PICS also 
contains tne Disk Parameter Tacies wnicn contain toe 
description of tne list drive and proviie a scratcnpad area 
for certain BL'OS operations. 



26 



Ill . INPUT /OUTPUT DEVICES 

In CP/^-So tne CCP and SDOS accomplisn all I/O via four 

logical devices, rue BIOS assigns whatever physical 
devices are in mat particular system to tnose logical 
devices. Tnis "napping in tne BIOS preserves tne independence 
of tne CCP and BEOS from me nariware configuration. 

A. LOGICAL I/O LE7ICES 

CP/M-sb addresses four logical I/O devices: tne console* 

l ne iisl ie v ice» l ne puI1 cn de v ice a n d &ne r eace r . Tee 
console is tne principal interactive peripneral tnrousn 
wnicn tne operating system communicates witn tne operator. 
Tne list ievi^e is tne principal listing device, usually a 
nardcopy printer. Tne puncn device is tne principal tape 
puncnin? device, usually a nien-speel paper tape puncn or 
teletype. Tne reader is tne principal tape reading device. 
.v.nen tne "lOBYT.S" function is implemented, dynamic lo^i^al 

to pnysicai device mapping nay be accomplisnea as described 
in Ref. b. 

B. PHYSICAL I/O BSUCi'S 

The CONIN, CONOUT, LISIOUT, PUNCH and READER routines in 
tne BIOS define tne pnysicai interfaces */itn peripnerals. 
Tne system adapter may define, in tne BIOS, sucn devices as 
cassette tape recorders etc. so lone as it is interfaced 



'11 



witn one of tne logical devices. In tnis adaptation tne list 
device and tne console device are ootn mapped to tne serial 
ed?e connector *nere tne CRT console is connected. Tne 
reader is "stubbed" vitft an "end of file" input, tnat is, 
instead of a routine to interface a pnysicai read device, 
tne BIDS siTiply returns an indication tnat tne real nas been 
complete. And tne puncn device ^ap is "stubbed *itft a 
return statement. 

C. DISK DEVICES 

1 . Hard Dis£s, Floppy Eis*s 

Tnere are many implementations of tne Hard ais^ 
tecnnolo^ies . Tnere are fixed arc movable neact disss, 
removable lis£ pactfs and even combination nard ani floppy 
systems. Floppy diskettes come mainly in tne 5" ana 3" size, 
single and double lensity, single and double sided, ani as 
indicated above in combination witn nam disss. 

2. Organization of Data 

Altnou?n eacn diss drive ray ze different, aata is 
stored in conceptually tne same manner. Tne diss surface is 
aividea into tracss (or cylinders, if a multi-platter 
system.) Sacn tracs is divided into sectors. Eacn sector is 
addressable by tne controller, matcing it tne basic unit of 
storage. In multi-platter and/or muiti-nead systems, to 
access tne disfc tne controller must select tne proper 
nead/ platter as well as tne tracs and sector required. 



22 



The amount or lata tnat can oe stored on a device is 
dependent on tne size of tne device and tne recording 
format. DouDle density, as tne name implies, gives twice as 
mucn storage on a diskette as single density. Tne cost, 
ncwever, is greater. 

Aitnousrn tne tasic unit of storage is tne sector, 
sectors are not tne saTie size in every system. In general • 
tne larger tne sector, tne more efficient tne storage, tut 
tne less efficient tne access, Many systems allow tne user 
to select tne sector size from a limited set of cnoices. 
Sectors are normally a multiple of 128 oytes. 
3. Interfaces to tne Computer 

Tne £ey to tne storage of information on tne 
recording media, at least from tne operating system 
modifier's point of view, is tne disic drive controller. Tne 
controller itself is usually a micro prog rammed 
microprocessor. Tne controller nancies tne actual reading 
from and writing to tne lisK in addition to otner functions 
sucn as sees, format etc. Tne relative autonomy of tne 
controller frees tne operating system from Having to Handle 
diss I/O on a primitive level. However, tne 3ICS, *nicn is 
Hardware specific, must still ~ommunicat^ *itn tne 
controller at a fairly low level. 

Most microcomputer system I/O is done oy DMA. In 
general tne nost operating system creates, somewnere m 
memory, an entity, often called a "command oacKet" or "I/O 



29 



parameter bloc£ or some similarly descriptive name. Tne 
"packet" is usually seven to ten Dytes or information wni^n 
contain tne detailed command for tne dis* drive controller. 
Tnese "pacsats" form tne sole means of issuing i/O commands 
to tne controller. 

Normally tne dis£ drive controller/interface snares 
a bus witti tne nost system. As a result tne controller's 
?OTimani/s tatus registers nave device addresses from tne bus. 
In "nost systems, tney can be set cy tne user p~icr to system 
start-up. 

Tne nost system sends tne address of tne I/O command 
pacKet to tne command registers of tne controller. Upon 
receipt of tnis address tne controller initiates action to 
gain control of tne dus. tfben tne controller nas control of 
tne Dus it reads tne appropriate number of bytes from tne 
address it va<^ siven. Tne controller decodes tnis 
information and tnen carries out. tne prescribed operation. 
Tne controller may signal completion in various ways, tne 
most common being entering a completion code in tne command 
oactcet for tne nost to read, sending an interrupt to tr.e 
nost processor, or storing tne status in an on-board status 
register for tne nost to read. 

Many systems alio* tne DMA to be "tnrottied", tnat 
is, tne controller gives up control of tne bus periodically 
in order to increase overall system speed. 



30 



Other features commonly Included in disfc drive 
controllers are: linked I/O, tnat is, the ability to execute 
more tnan one I/O command paciet without prompting from the 
nost processor. M ultiple sector I/O, tnat is, the ability to 
read or write more tnan one sector in response to a single 
I/O command pacxet. 

4. Examples of Particular Controllers 

a. iSEC 201 (Single Density ^DS) 

Tne iSEC 221, as described in Ref. 7, is ice 
controller/interface for INTEL'S INTELLEC V DS £06?, an 8060 
processor cased microcomputer development system. 

(1) iSBC 201 Controller Operation . Tne 
controller is composed of two circuit boards, a cnannel 
board and an interface board. They interface with tne nost 
processor via tne system MULTIBUS, a system's bus used by 
INTEL Corporation. The channel boara ana interface board 
togetner nandle ail communications between tne nost CPU and 

the diskette system. They contain an 6-bit microprogrammed 
processor wnicn can access system memory for obtaining" 
channel commands via DMA. The controller also monitors tne 
diss subsystem status ana error conditions and ma^es their 
status available to the nost CPU. 

Tnis iisxette system records data by tne 
Frequency Modulation (FM) metnou, giving a formatted E" 
diskette capacity of approximately 256K bytes, divided into 
77 tracts of Z'o sectors each. 

31 



Functionally, me nost CPU must create a 
command pactcet in memory for eacn operation. INTEL calls 
tnis packet an I/O Parameter .bloc* (IOPB). An IOPB is ten 
bytes in lengtn and specifies all trie details of tne 
diskette operation to be performed. Tne CPU, in tne ^ase of 
CP/M-S6, tnrougn tne BIOS module, sends tne address of tne 
IOPB to tne controller. Tnen tne controller sains control of 
tne bus, retrieves tne IOPB and executes tne commanc. Upon 
completion tne controller posts tne diskette subsystem 
status and, if enabled by tne IOPS, senas a completion 
interrupt to tne nost CPU. Tne information in tne IOPB 
consists of: 

Byte 1 - tne cnannel word, tnis byte specifies tne 

enabling of tne Iocs: override, random format 
of tne Iock: override, random format sequence, 
interrupt control, data word ien*?tn f successor 
bit, brancn on wait and wait bits. 
Byte 2 - specifies tne drive selected, data iengta (3 
or lb bits/word) and tne operation to be 
performed . 
Byte '6 - specifies tne number of sectors to be 

transferred. 
Byte 4 - specifies tne target tracs number (0-77). 
Byte 5 - specifies tne first sector to be accessed (1- 
26) . 



32 



Byte 5 - specifies tne least significant byte of tne 

Duffer aidress. 
Byte 7 - specifies tne most significant byte of tne 

buffer airess. 
Byte 8 - indicates a blocss: number wnicn allows a unique 

identification of an IOPB luring linked I0PB 

operations. 
Byte 9 - contains tne least significant byte of tne 

buffer aidress of tne next linked IOPB. 
Byte 10 - contains tne most significant Dyte of tne 

buffer aidress of tne next linked IOPB. 



Tne iSBC 201 can execute seven ^ommards: 

1) recalibrate (seex tracu: 0) 

2) sees. 

3) format a trade 

4:) write data (witnout adlress mar^s) 

5) write data 

5) read data 

7) verify CRC 

Tne controller nas seven registers tnat are 
accessible to tne nost CPU. Tne nost CPU can read tnree of 
tne registers: Tne Result Status register indicates tne 
status of botn drives (ready or not ready), tne status of 
tne controller for tnat drive (present or not present^, and 
tne status of tne controller's interrupt flip-fiop 



33 



(interrunt pending or completed). Tfce Result Type register 
indicates wnetner tne Result Byte ree-ister contains I/O 
error codes or ready status. Tne Result Byte no Ids tne I/O 
error codes or diskette drive status. Tne nost CPU can write 
to four of tne controller's registers: Writing 1 anytning to 
tne Reset Diskette System register resets tne entire 
diskette subsystem. tfriting to tne Stop Disicette Operation 
register terminates I/O after completion of trie current 
operation. Tne Memory Address Lower register receives tne 
least significant byte of tne address of tne IOPB. Tne 
Memory Address Upper register receives tne most significant 
byte of tne IOPB address and wnen written into signals tne 
controller to retrieve tne IOPB and commence tne specified 
operation . 

(2) BIOS r Jse of tne iSBC 201 . Tne CP/M-Sb BIOS 
uses only operations 1, b and 6 (sees is implicit in read 
and write operations). In addition, CP/M-Sb io°s not use 
linked IOPB's and only does single sector disK accesses. 
Tnis very mucn simplifies tne I/O routines in tne BDCS ard 
tne BIOS. Not using tne linicea ICPB capability allows 
reducing tne IOPBs to tne first seven bytes, of wnicn bytes 
1 and 3 renain constant. Byte One remains uncnangea because 
tne mode of dis£ access remains uncnanged. Byte Tnree, tne 
number of sectors, remains set at one, and tne operating 
system is freed from computing tne number of sectors per 



34 



access. Tnese simplifications alio* tr.e EIOS tc have a 

single IOPB template in menory. 

A. limitation of the iSBC 271 is its 16-bit 
addressing. Tnis limitation mean? tnat tne controller can 
only address S&Z of system neTiory as compared tc tne 8K^d 
processor's mesatvte of address space. As a result, tne 
external address of tne iSEC 56/12 must reside in tne first 
54r£ of tne Tieeaoyte (from 0fc,W0H to 0FFFFH). Tne SIOS in 
tnis adaptation converts tne segment and offset address 
provided by tne BDOS into a 16- bit pnysicai address for tne 
controller. 

(3) Bootstrap L T se of tne iS2C idk'l . Tne bootstrap 
program does use tne multi-sector access capability of tne 
controller for loading tne cold start loader. Tnis requires 
four IOPBs in tne bootstrap program but reduces tne number 
of dis£ accesses from 53 to four. Considering tne 
specialized function of tne bootstrap loader and its lace of 
interface witn tne BDQS, tnis is a very efficient deviation 
from tne otnerwise efficient OP/ 1 *! Tetnoo. oi msx access, 
b. iSSC ZVd (Double Density MPS) 

Tns iSBC '<LTZ is tne controller/interface for 
INTEL'S INTELLEC MDS S8£ microcomputer development system. 
It is described fully in Ref. B, 

( 1 ) iSBC 222 Controller Operation . From tne 
users point of vie* tnis controller is essentially tne sane 
as tne iSBC 201. Tne main difference is tne recording 



3b 



format. v odif ied-Modif ied Frequency Modulation ( M MFMl is 
Used, allowing tae same media to dold (formatted) 512K bytes 
of data, divided into 77 tracts of 52 sectors eacn. Tnis is 
twice tne capacity of tne single density system. 

(2) BIOS Use of tne iS.bC 202 . Tne interface to 
tne controller is tne same as tnat of tne iSSC 201. Tne 
difference in organization and capacity is only evident in 
tne dist definition table "DOUBLE. LIB" . 

(3) .Bootstrap Use of tne iSBC 202 . CP/M's double 
density formatter formats tne first two traces of a diskette 
in single density, ie. 26 sectors per tracK. T h .e -oil start 
loader fits in tne first two tracts of a douole density in 
tne same way as in sinele density, ks a result, the sare 
bootstrap program will load tne cold start loader from both 
single and double density diskettes. 

c. REMBX RDW 3200 

Tne RDtf 3200, as described oy Ref. 9, Ref. 10 
and Ref. 11, is a tiulti drive unit consisting of a fixed 
Wincnester Tecanology 14" dist and two 8" flexible diskette 
drives. Tne diskette drives are "jumper" selected as eitner 
single or double density. In botn types tne sector size is 
selectable. Tne formatted capacity of tne fixed dist witn 
sector size set at 129 bytes is 10 megabytes. Tnis data is 
on 210 tracts of 104 sectors for eacn of two read/write 
deads. Tne single density floppy drives, formatted for 123 
bytes per sector, noid 26 sectors on eacn of 77 tracts for a 



3b 



total of 256K bytes of storage. Set for double density, tie 
smallest sector size available is 256 Dytes. At 26 sectors 
per tracs, for 7? tracts, formatted storage is 512K bytes. 

If this drive were use! for CP/M-86 in the double density 
mode, the difference between diskette sector size (256 
bytes) and CP/M-B6 sector size (12b Dytesl would be Handled 
by a "bloc£ing/deoloc£ing" algorithm iiice tne one provided 
witn CP/M-86. 

(l) Tne P .DW Controller . Tne neart of tne 
controller is a microprogrammed Motorola 6820 8-bit 
microprocessor. Tne controller pnysicaiiy resides inside tne 
RDrf frame and is linked to tne Host system by an interface 
card. Tnis alteration utilized a M, JLriEUS interface, wnicn 
resided in tne Host's system MULTIBUS. Tne interface 
provides registers for communication between tne nost and 
tne controller CPU's. Data can be Handled as 8-bit words, 
15-bit words or as 8-dit naif-words. Tne controller can 
accomplisn I/O by DMA, programmed I/O or &y interrupts. All 
disfc writes are by ^odif led-Modif ied Frequpncy Modulation 
(MMFM). The distr drive system can also be DMA throttled, 
wnicn permits other masters to sain access to tne system's 
bus in between accesses by tne diss unit. 

functionally, tne nost CPU must create a 
command packet in memory for each operation. A command 
pactcet is six to fourteen bytes in lengtn and specifies ail 
tne details of tne diSK operation to be performed. In the 

37 



D"k moae trie nost CPU must test trie status register in tne 
controller interface to assure tnat tne controller is ready. 
Vnen tne controller is ready tne CPU, in tne case of 
CP/^l-es, tnrou?n tne BIOS roiule, sends tne address of tr.e 
command packet to tne controller interface. Then tne 
controller ?ains control of tne bus, retrieves tne command 
packet and executes tne command. Upon completion, tne 
controller posts tne disK subsystem status in tne command 
packet in system memory and, if enabled by tne command 
packet, sends a completion interrupt to tne nost CPU. Tne 
command packet consists of six to fourteen bytes. Tnis 
controller supports five types of operations. Tne size of 
tne packet and tne information it contains are determined by 
tne operation to be performed. Tne five operations supported 
are : 

1) read data/write data 

2) write I.C. and data for single record 
(fixed dis£ only) 

3) copy from one drive to anotner 
<r ) format designated disfc 

5) maintenance package 

Tne controller nas four registers tnat are 
accessible to tne nest CPU. Tne base address of tnese 
registers is switcn selectable. Tne base address plus one is 
tne status register, from wnicn tne nost CPU determines 



38 



system status. Trie base address plus tnree receives tne 
lower byte of tne address cf tne command packet. Tne base 
address plus two receives tne middle Dyie of trie command 
pactet address. Tne Dase address receives tne upper byt° cf 
tne pactet address (RDW 3200 supports 24-bit addressing) and 
wnen written into signals tne controller to start DMA. 

(2) BIOS Use of tne RDW 52E0 . Tne CF/M-66 BIOS 
would use only tne read/write operation. Tne fact mat tne 
hard dist has more tnan one nead would require tnat tne .BIOS 
dist definition table loon line one continuous set of traces 
and tnat prior to initiating DMA, tne BIOS translate a 
logical tract number to a physical head and tract number. 
Tne read and write pactets nave tne same format wnicn 
requires only one pactet template in tne BIOS. Tnat packet 
tates tne following form; indicated as 15-bit words: 

Word - I/O modifiers (linted I/O , interrupts , etc. ) , 
operation and drive selected. 

Word 1 - status word - written by controller. 

Word 2 - tract number. 

Word 3 - nead and sector start number. 

Word 4 - lower 16 bits of D M A address. 

Word 5 - nign byte of DMA address. 

Word 6 - transfer word count. 

Although tne RDW supports 24-bit 
addressing, it requires a 24-bit physical address, not the 



3C 



segment and offset type address provided by trie BIOS . 
Therefore trie SIOS must translate tns addresses before 
placing tnem in tne command pacxet and before senain-s- tnem 
to tne interface. 

(3) bootstrap Use of tre RDjj Z'dZ't . Tne 
bootstrap program would use tne nuiti-sectcr access 
capability of tne controller for loading tne cold start 
loader (tne command packet specifies tne number of woris 
to be transferred). If tne operating system were to be 
loaded from a diskette, tne bootstrap operation would be 
very mucn liKs tnat described for tne iS.BC JdfeJl. For a 
system load from tne nard disi tne bootstrap program couid 
load tne operating system witnout tne use of a cold start 
loader. Tnis would only require two CLisfc accesses, ore to 
determine tne load location and tne otner to actually load 
"CP M .SYS". 



40 



17. ALTERATION OF CP/M-86 

A. CHANGES REG'JIRED TO IMPLEMENT CP/M-86 

As distribute!, CP/M-86 is set up ror operation witn an 
Intel SBC 86/12 microcomputer ana an Intel SBC 2V& iisKette 
controller with a Snu^art SA-888 floppy disK arive. Since 
CP/M-86 is modular, only tne BIOS need be modified for "nor. 
standard" hardware. Tne distribution version includes source 
code for its BIOS and a skeletal BIOS to aid in tne 
construction of a customized version. Although tne 
distribution version does not provide a bootstrap ROM, tne 
source code for tne program is provided. Tnis source code 
provided an example for tne creation of a customized 
bootstrap program. Tne bootstrap HOM is available from 
Digital Researcn. 

The cnanges required to customize tne BIOS can be 
divided into four types. Tne first consideration is tne 
computer selected for the implementation. If an £086/6888 
based computer otner tnan tne iSBC 86/12 were cnosen, tne 
computer initialization, including the constant definitions 
for USART ports and character I/O routines sucn as console 
status, console input and console output, nave to be cnanged 
to match the host hardware. Since the iSBC 86/12 was used, 
no changes were required in tnis portion of the BIOS. 
Second, if the disic drive controller or other DMA device is 



41 



not an iSBC 204:, tne controller port definitions and trie 
routines wnicn actually communicate witn tne controller "iust 
be altered. Tne "execute" and "sendcom" routines were tne 
Dul£ of tne modification. Tnese routines cnecK system 
status, translate system commands tc tne language of tne 
controller, deliver tne commands to tne hardware and nandie 
any nardware errors. Tnird, if any otner serial cr parallel 
I/O device is to be used, tne appropriate initialization and 
execution routines must be written. Tne fourtn consideration 
is the disc definition table which is assembled witn trie 
BIDS via an "include" statement. Diss parameter taDles must 
be created to describe the diss system. Diss parameter 
tables are discussed in tne next section. In tnis version 
only tne second and fourtn types of modifications were 
necessary and tnose cnanges are reflected in Appendix A 
(single density) and Appendix E (dounle density 1 ). Appendix D 
contains tne distribution BIOS. After assembling tne BIOS, 

tne hexadecimal code, "3I0S.H56", is appended to "CFM.E86" 
and a command file is generated by tne metnod descriDed in 
Ref. 6 usine the OENCMD utility. The file created is named 
"CPm'.STS" and is tne operating system. 

B. DISS PARAMETER TABLES 

The dis£ parameter table serves to define the 
organization of the storage media for the BTOS file 
management functions. Tne disk: definition consists of tne 



4H 



sequence of statements in Figure 6 (as snown in Ret'. 6). ?ne 
DISKS statement defines tne number of drives in trie system, 
witn n being an integer from 1 to 16. A series of DISKDEF 
statements follow. Eacn statement defines tne 

cnaracteristics of a logical diss, tnrou^n n-1. DISKESF 
statements are formed as defined in Rsf. 6. Tne format is 
snown in Figure 7. 



DISKS n 

DISKDEF B,... 
DISKDEF 1,... 



DISKDEF n-1 
ENDJfif " 

Fieure 5 EIOS Diss Definition File. 

DISKDEF dn,fsc,lsc, [sfcf J , bis ,dfcs ,dir,cics ,of s , [0] 

wnere 



dn is tne logical disfc number, to n-1 

fsc is tne first pnysical bector number U' or 1) 

Isc is tne last sector numoer 

skf is tne optional stew factor 

bis is tne data allocation Mock size 

d£s is tne disfc size in fcis units 

dir is tne number of directory, entries 

cfcs is tne number of "cnecKed' directory entries 

ofs is tne tract offset to logical tract ££ 

[0] is an optional 1.4 compatibility fiag 

Figure 7 DISKDEF Statement Format. 



Tne diss tables may be venerated by .nand or by executing 
tne GENDEF utility proeram. Tne table provided witn tne 



43 



distribution version, called SINGLES .LIB" , was generated 
fro-n tne source file "SINGLES .DEF" cy tne GENDEF utility 
running under CP/M-610. Tnis table was correct for tne single 
density implementation. It was necessary to create a -ew 
table for tne louole density system. Tnis file is called 
DOUBLE. DEF. Table s-eneration is described fully in Section 6 
of Ref. a. Tne diss parameter tacies are listed in tne BIOS 
rignt after tne "include" statement (see Appendices A and 
B). 

C. COLD START 

1. Tne Cold Start Loader 

Since CP/M-86 is too larsre to fit in tne first two 
(system) traces of a diskette, it is loaded into memory in 
two st ps. First, a cold start loader is loaded from tne 
first two traces into memory. Neit tne loader loaas tne 
operating system and transfers control to it. Tne loader 
("LOADER. CMD") is a simplified version of C?/M-c6 witn 
enougn power to locate tne operating system file "CF^.SiS" 
on tne current disK, maee tne proper initializations, load 
CP/M-Sb into memory and tnen transfer program control to it. 
Tne loader is created from files LDCPM, IDBDOS ar.d tne 
loader version of tne BIOS. Tne loader BIOS is venerated 
from tne same source code as tne BIOS by setting tne 
software switcn "LCADER_BIOS" equal to true prior to 
assembly. 



44 



The loader program is noved to tae first two traces of a 
diskette by tne LCCOPY utility if running on a wording 
CP/M-36 system. If developement is done on a CP/ v -8tf system 
tftis can be accomplished witn tae DDT and SYSGEN utilities. 
P.ef. 6 errs in its description of tne latter procedure. Tne 
correct procedure is describe! in tne next chapter. 

2. Tne Bootstrap ROM 

In order to sel tne cold start loader into memory, 
tnere must be a bootstrap loader of some Kind. This boot 
loader must initialize the programmable chips on the single 
board computer and tne disff drive controller wnicn will 
access the operating? system dis&. It then loads the rirst 
two tracts of tne diskette in tne system disK drive into 
memory and then transfers control to the program loaded, 
"LO/VDER.CMD" . Tne bootstrap program is normally resident in 
a read only memory (ROM) or electrically programmable ROM 
(EPROM) ana is tnen referenced to as tne coot ROM. 

The distribution version of CP/M-66 also contains 
tne listing for a bootstrap RCv (ROM.A86). Tne boot ROM 
itself is available from Digital Research. Vhen installed, 
it becomes part of the B0B6 address space. Upon system 
reset, the processor begins execution at effective address 
0FF000H, wnicn is tne top paragrapn of tne iSBC 86/12 EPROM 
space. The bootstrap program is nardware dependent which 
necessitated tne creation of a customized initial loader for 
this implementation. 



45 



Intel's SEC =>b7 Execution Venicie Monitor (EVM) 
occupies trie EPROM locations when installed in tne iSBC 
66/12 and is currently in use at tne Naval Postgraduate 

School. In order to retain tne use of tne iSSC 957 and to 
simplify implementation ♦ tne customized bootstrap program 
nas been embedded in a free area of tne EVM's SPRO^s. Since 
tne monitor initializes tne single board computer wnen it is 
started, tne CP/"i-feS bootstrap tas£ is simplified. Tne 
bootstrap proe-ram listing is in Appendix C. It is a modified 
version of tne "debug" version of Digital Research's ROM 
program. Tne modified bootstrap program is located at 

effective address 0FFD40H. It may t° executed from tne EVM 
by executing tne command GYID^i'Z or its equivalent. 



4S 



7. CONCLUSIONS AND RECOMMENDATIONS 

A. ADAPTATION DIFFICO*LT T 

Modification or CP/M-60 is a straientf orward simple 

procedure if one is familiar witn CP'P on a system's 

software level and witn at least some representative 

nardware. jf one does not na v e s u cn a cacceround (tne author 

did not)t tne tas* is not overwneimi na , but considerably 
more difficult. Tne novice will probably invest nucfi time 

and effort in investigating "dead ends" because of not 
understanding tne logical design of tne operating system. A 
oarticularly vexing problem encountered in tne first 
aiaptation was tnat in tne later stages of developmert, 
every error in tne corrected software seemed to destroy tne 
information on tne diskette, mating decugging difficult and 
requiring frequent regeneration of software. During tnis 
period of "destructive testing" approximately 90% of tne 
time and effort were spent on sucn overhead and only iv% on 
actual debug?insr. Tne real proDlem tnere was not tne time 
lost but tne interruption in tne train of tnougnt. 

Documentation inadequacies are anotner source of 
problems. Tne alteration guide for CP/M-bb provided ny 
Digital Researcn (Ref. 6) assumed a tnorougn Knowledge of 
CP/M-80, w&icn was not possessed by tne autnor. Tne CF/M-Efc? 
documentation also seemed to assume a tnorougn Knowledge of 



47 



tne operating system's T.odules. In addition, mere were 
several errors in tne alteration guide. 

Tne procedure for moving tne cold start loader to traces 
zero and one under CP/ V -S2 is incorrect and if followed tne 
first B02fi bytes of tne program will be lost. A. correct 
procedure is to load tne cold start loader *itn DDT, move 
tne program so tnat it starts at 900H, exit DDT and finally 
call tne SYSG-SN utility. & correct sequence of commands 
1 o o K s lixe tnis: 

CBT LOADi'R.C^D 

mll00, 1800, 1900 

ma00,1100 ,1H?0 

m4^' , a^e t ce;e 

ml20,400 ,y&0 

<CONTROL-C> 

Sl"SGEN 

<CR> 

E 

<CR> 

Tne documentation for tne B0S6 assemblers, "ASMyb. COM" 
and "ASve6.CMD" also contains errors. According to tne 
user's manual, [Hef. 2] , tne "device switcn" for tne listing 
device is "?". Tne correct switcn is "l". 

Tne tecnnical manuals providec witn tne disK drives ana 
controllers used ratner ambiguous and non standardized 



43 



terms. Tnis often requirei exoerimentat ion to determine wnat 
was really react. 

Resolution or the above difficulties, however, was a 
good learning experience for tne author. 

B. RECOMMENDATIONS FOR FUTURE HARD DISK ADDITION 

1 . Discussion 

AltP-ou?n there are several metnods or accomplishing 
disK I/0 t DMA. seems to be tne simplest to implement and 
debug. A future nard diss addition would greatly enhance 
CP/M-86's usefulness. In tnis vein, a nard lisle/floppy disx: 
combination would be ideal. The combination or hard and 
floppy discs would provide tne speed and storage capacity on 
one hand (from tne nard dis*) and tne ability for tne user 
to Keep copies of his files wnere ne is assured of their 
securitv and integrity. However, inclusion of tne i SBC 201 
or 2V2 is not recommended. The limited addressing capability 
of tnese controllers would Hinder overall system 
effectiveness and force tne processor to operate in tne 
bottom 64£ oi tne address space. As a rule of thumb, it' more 
tnan one device is to fie aided to tne basic system, oniy one 
device should be added at a time. 

2, Template for Adaptation 

Given tnat a nard disx is to be installed in place 
of the diskette system, tne following procedure snculd ne 
followed: 



4:9 



First, trie CP/M-Bb BIDS saould Be studied in 
conjunction witn tne current nardware to see now tne 
interface is currently accomplished. Tne system modifier 
must understand now tne operating system interacts witn 
nardware Defore creating nis own interface. Second, trie 
target nardware must ce studied. Tne electronics are not 
important, nut wnat tne nardware dees logically and now it 
communicates witn tne controller is paramount. In 
particular, tne organization of data on a dist drive must dp 
thoroughly understood. If tne organization of data is 
selectable, tne most efficient and straightf orward 
organization must fie cnosen. If it is not selectable and not 
directly compatible witn tne 3D0S, a " Dlocting/de blocking" 
or some other scneme must be considered. Third, a dist 
definition must be written to reflect tne logical 
organization of tne disc. If tne logical organization of 
data does not matcn its pnysical organization, tne executing 
routine in tne BIOS would nave to mate tne translation. For 
example, in a muiti nead diss system, tne trades would nave 
to be numbered in tne list definition as though tney were en 
tne same platter (logical org.), tne BTOS would select a 
sector and a "logical" tract for I/O, but before sending tne 
cnannel command tne BIOS would nave translate tnat "logical" 
tract number to a nead and tract combination. Fourtn, a 
template for tne cnannel command snould oe placed in tne 
BIOS witn appropriate variable names to allow the ETOS to 



50 



provide as nucn information directly as possible. Fiftti, 
write tne "execute" routine. Tni s routine, tne ouifc of tne 
coding, must complete tne cnannel command, prepare tne disK 
for access, send tne activating command, cnecic completion 
status and nandie nardware errors. This step requires a good 
Knowledge of tne target disfc system and is very mucft 
dependent on tlie disfc cnosen. Sixtn, once tne revised BIOS 
is written, it must be assembled (in tne loader version toe, 
if booting from a floppy disfc). Tne files "CPM.H56", 
"EI0S.H86" and "PAT2.H66" are combined into "CPMX.K86". This 
resulting file is converted to executable form by executing 

tne command "SENCMD CP*X 8080[A403' as described in Ref. 5. 
Tne resulting file is tnen renamed "CPM.SYS". 

Tne bootstrap program will be very simple. It can te 
written to explicitly read tne first sector of tne dis£, to 
determine tne loading target address, and to read tne 
following 76 (128 byte) sectors. Once tne BIOS nas been 
modified, tne bootstrap program will oe almost a trivial 
subset of tiat code. 



51 



APPENDIX A 
title 'Customized Basic I/O System' 



* Tnis Customized Jb 105 adapts CP/M-ee to 

* tne following Hardware configuration 

* Processor: iSEC 8612 
~ Controller: iSEC 201 

* memory model: "080 



* Programmer: M.B. Canaalor 

* Revisions : 






^^&&tf &&&&#? ^¥ &&^&&&&&V^V&&&^&&'£&'fZf*P'*>fXfiXfiZIL*fi'f'n'fi>Z 



true 
false 
cr 
If 

max retries 



equ -1 

equ not true 



equ 0dn 
equ Pan 
equ 10 



carriage return 

line feed 

for aisi i/o, Before perm error 



v " Loader_bios is true if assembling tne v 

* LOABER~BIGS t otnerwise BIOS is for tne * 

* CPM.SYS file . * 

•r 'r 



LOADER_BIOS 
bdos_int 

IF 



SOU TRUE 

equ 22<t >* reserved BDOS interrupt 

not loader bios 



t i 
bios_code 

ccp_of f set 

bdos of st 
. i 

» i 



equ 250011 

equ 0000n 

equ zB06n ; BDOS entry point 



ENDIF »"not loader bios 



IF 



ioaaer bios 



> i 

bios_code 
ccp_of f set 
bdos of st 



equ 1200n 
equ 0003n 
equ £4:£fc>n 



start of LDBIOS 
base of CPMLO&DER 

stripped BDOS entry 



52 



t 



endif 



>* loader bios 



csts 

data 



equ 0dan 
eau 0d3n 



JIS251 status port 
; la ta 



* INTEL iSBC 201 DisK Controller Ports - 

;,c^ ;? J* ;,- >£ ;,; s;; ;^ ;*. -,c ;,c;^ -^ *,«^ zfi *n ^^^r r £ '^^5? J r *£^ ^c^^ ^;^ ;,c;,i ^^t a^ ^? i ;; ; ;^;;?^^ 



base 


eq.u 


0?Bn 


rtype 


equ 


Dase+1 


rbyte 


equ 


base+2 


reset 


equ 


base+7 


dstat 


equ 


base 


ilow 


equ 


base+1 


inign 


equ 
cseg 


oase+2 




org 


ccpoff set 


ccp: 








org 


bios code 



'A *|i *(* * t * »|5 3}C 3|C »|i ij* »(* V^S ',» J|4 i,i #|5 *g% ?,% i,» f|* #|* «g» - t » ;,* ^,J *,i ?,£ iji *,* i,i *,£ ^* ^ 3,C -^i J,C f|* J,I -,i *,» *f* »,* #,* »,» - s i »,i 

* BIOS Junp Vector for Individual Routines * 

3? ^s j^ qe >? St sjc 5? ^e ^t .-jc a? ^e »? ^e jjc ^e flt sp j^ qe ^t ^e ^ jjt ^t ^t 5? 3^ jjs ^t j^c ^s j,; s? ^ J? =? nS JP 5? V ^s ^t ^e 



Enter from BOOT ROM or LOADER 
Arrive tiere from BDCS call 
return console Keyboard status 
return console Keyboard cnar 
write cnar to console device 
write cnaracter to list device 
write cnaracter to puncn device 
return cnar iron reader device 
Tiove to tr& 00 on cur sel drive 
select dis£ for next rd/write 
set tracff for next rd/write 
set sector for next rd/write 
set offset for user cuff (DMA) 
read a 128 byte sector 
write a 12fc byte sector 
return list status 



JTIP 


INIT 


J^P 


WBOOT 


J^P 


CONST 


J"np 


CONIN 


jnp 


CONOUT 


J^P 


LISTOUT 


J^P 


PUNCH 


jTip 


READER 


j'np 


HOME 


j-np 


SELDSS 


jmp 


SETTRK 


J^P 


SETSEC 


jmp 


SET DM A 


3^V 


READ 


jup 


WRITE 


limp 


LISTST 



b3 



j "np 

j"np 
J^P 
jnp 



SJBCTRAN 

SETD^AB 
GETSEST 
GETICBF 
SETIOBF 



Jxlate io?ical->pr.ysi cal sector 
>*set see 1 case for cuff (DMA) 
;return offset of ^em Desc TaDle 
Jreturn I/O mao byte (I03ITE) 
isei I/O rap byte (IOBYTE) 



;,C V 'i* * i* ^* S* *l* *i* 'I* *>~ *l" *.* *I~ •.* -i* 'I* *<***• *i* *»• *l* *l* *i* *l* *■* *i* V »i* •■* ^5 *«£ *? '? »»• *i» *|» •<* *l* *|» »l* *i» *l» *l* *»» *«* 

Sj! * 

* INIT Entry Point, Differs for LDBIOS anl * 

* BIOS, according to "Loader_Bios " value * 

^,J 3(5 ~J£ *fi Zfi ?JC JJC *p ?,X ?",* *^ ^ JJi 2|( ?JC *i% *,» 5,C J^l *^i ~,C i^ ^,4 *£ ?JC 2j* «|* *^£ ^JS 3JC J^S ^i JJS 7j£ iJC i,» 2JC 2^C ?,» 3JC 2jC ^X 3,4 3JS ^i 



INIT: Jprint signon message and initialize hardware 
mov ai.cs >we entered witn a JMPF so use 
mov ss,ax ;CS: as tae initial value of SS 
mov ds,ax ?DS : , 
mov es,ax Jand ES : 
Juse local stacK during initialization 
mov sp, offset stsoase 
eld >set forward direction 



IF 



not loader dios 



i i 



i 
i 

; Tuis is a BIOS for trie CPM.SYS file. 

t Setup all interrupt vectors in low 

; memory to address trap 



pusn ds Jsave trie DS register 

mov IOBiTE,£ ;ciear IOBYTE 

mov ax , 

mov ds,ax 

mov es*ax Jset ES ana ES to zero 

♦setup interrupt to address trap routine 

mov int0__of f set f offset int_trap 

mov int 0_ segment ,CS 

mov di,4 

Jtnen propae-ate 
Jtrap vector to 
Jail ^5b interrupts 
proper interrupt 

mov odos_of f set , bdos_of st 

dod ds Jrestore trie DS register 



mov s i , id 

mov ex, 510 
rep movs ax, ax 
JBCOS offset to 



(additional CP/M-c6 initialization) 



ENDIF Jnot loader_oios 
IF loader dios 



54 



! i 

?Tnis is a BIOS for trie LOALJSR 
pusti is » save data segment 

Tiov ax , 2) 

mov is, ax Jpoint to segment zero 

?BDOS interrupt offset 
tiov Ddos_oi'i set , oio s_of s t 

mov odos_segment ,CS Jodos interrupt segment 
; (additional LOADER initialization} 

pop is » restore data sesment 

. i i 

> i i 



» 



SNDIF ; loaier_t>ios 

mov ox, off set si?non 

call pmsg Jprint signon message 

mov cl,0 » default to dr A: on coldstart 

jmp ccp i J limp to coll start entry of CCF 

W500T: j-np ccp+5 idirect entry to CCP at commaria level 

IF not loader_bios 

i i 

i i 

int_trap: 

cli ;cioc£ interrupts 

mov ax , cs 

mov is, ax Js'et our lata segment 

mov dx, offset int_trp 

call pmsg 

nit jnardstop 

: ' ' 

» i i 

• 

> — — ■ 

SNDIF ;nct lcader_oios 

Zf. J? Xfi 3? JJC J£ 3f 3?C ^ tf V =? ** ** =P T« 5? T= 3^: J? J? ^S JJt V =? >? V V *f »r T« =? 5? 5£ T* V *fi *? ^ f •=? Sp =? *= ** 

;,: CP/M Cnaracter I/O Interface Routines * 

-~ console is USART (18251A) on i3*C 3612 * 
* at ports D6/DA 

J£ jp 5? Jjt J* V T« 5? *S S? =P ^ f f V *F =? V ^ *< >£ 5? 1 5? =P V ^ V V T« J? ^ T« V V ^ SC & =P =P ^ ' ^ 5? V ^ 

CO^ST: Jconsole status 

in a i , c s t s 

and al,2 

jz const_ret 

or al,255 jreturn non-zero if na 

cons t_ret : 

ret Jrcvr data available 



55 



CON IN : 



call CONST 
jz CONIN 
in al ,cda ta 
and al,7fti 
ret 



; c o n s o 1 e input 

>*wait for RE A 

Jread data & remove parity pit 



CONOUT: Jconsole output 
in a 1 , c s t s 

ana ax , 1 
jz CONOUT 
mov altd 
out cdata f ai 
ret 



."get console status 



» transmi tter buffer is empty 
Jtnen return data 



LISTOUT: 
LISTST: 

PUNCH: 
READER: 

^ETIOBF: 

SSTI33F: 



ret 



ret 



J lis t devi ce output 
Jnot implemented" 



»poli list status 
»not implementea 



Jwrite puncn device 

?not implemented 



mov al,lan 
ret 



^07 AL,0 

ret 



ret 



; re turn eof for now 



;I0B*TE NOT IMjrli-IENTED 



JioDyte not implemented 



> Routine to ?et and ecno a console cftaracter 
; and snift it to UDDer case 



uconecno : 

call CONIN 
pusn ai 
mov cl,al 
call CONOUT 
pop ax 
cmp al • 'a ' 
j b uret 
cmp ai , 'z ' 
ja uret 



;get a console cnaracter 

Jsave and 

Jecno to console 

,'iess tnan 'a' is ok 

greater tnan ' ' z' is ok 



5b 



' _ * ' . ' 



uret : 
pnsg • 



sub ai , a - A ;else snift to caps 

ret 

tiov ai,[3XJ Jget next cnar from message 

test al ,al 

jz return >if zero return 

mov CL,A1 

call CONOUI ,'print it 

inc bl 

jmps pmsg Jnext cnaracter and. iooo 

» Diss Input/Output Routines v 

SELESK: Jseiect diss given Dy register CL 
ndisss equ Z Jnumber of disss (up to 15) 

mov diss t cl isave diss number 

mov bx f fc?000H Jready for error return 

cmp ci t ndisss »n beyond max disss? 

jnb return Jreturn if so 

mov cft,0 Jdouble(n) 

mov bx t cx Jbx = n 

mov cl,4 Jready for ^16 

sni bx,cl »n = n * lb 

mov ex, offset dp base 

add bx , ex Jdpbase + n v 16 
return: ret Jbx = .dpn 

HOME: Jmove selected diss to nome position (Tracs Z) 

mov io_com,nomcom 
mov trs,0 
call execute 
ret 

SETTRK: Jset tracs address given by CL 
mov trs t CL 
ret 

SETSEC: » set sector number given by cl 
mov sect,CL 

ret 

SECTRAN: Jtranslate sector CX usin? tacie at [EXJ 
mov en , 
mov bx,cx 

add bx,dx f'add sector to tran table address 

mov bl f [bxj »get logical sector 



b7 



ret 

3ETDMA: » set DMA offset £iver by CX 
mov ima_adr,CX 
ret 

SETDMA-b: Jset DMA segment given by CX 
mov dma_seg,CX 
ret 

i 

GETSEGT: jreturn address of pnysicai memory taDie 
mov dx, offset se2_tabie 
ret 



JJS 3jC 3JI r^C 3JC 3p 5JC SJX r,£ 5JC 2p ?,£ JJC JJS Jp ?JS *-|* iJC *i» rfC 5JC ?JC 5JS J^£ *,C 5JX Jj* 3|C ;,£ J|£ 2,i JJC ^C *£ *," 5~,i *j£ *,! ?j£ 2jC *H 2,£ Z\" X,» *,» 



All Hsk: I/O parameters are setup: * 

DISK is diss: number (SELDSK) * 

TR£ is tracK number (SETTRK) * 

SECT is sector number (SETSEC) * 

DMA_ADR is tne D V A isb offset * 

READ reads tne selected sector to tne DMA* 

address, and WRITE writes tne data from * 

tne DMA address to tne selected sector * 



rfi * 

'i* 1^ *i* *i* *|* 3j» *i» *t* T* T* '** *|* *i* "J* *i* "T* *** f* T* *P **^ "5* *i* *5* *P ^i* *¥* *i* *>* *B* *i* *i* *9* H* *r *f* *P *'* *** *i^ *P *** *l* ^^ ^^ 



READ: 



mov cl ,4 

mov al t dis£ 
sal al.ci 
or al , rdcoie 
mov io_com,al 

jmps execute 



» combine diss selection 
Jwitn opcode 

jcreate ionb 



WRITE 



mov cl ,4 
mov al , di s«r 
sal al.ci 
or a 1 , wr~ode 
mov io_com,ai 



; create iODb for write 



EXECUTE: 

outer_retry : 

mov rtry_cnt ,max_retries 



retry: 



in al,rtype 
in ai,rbyte 
call sendcom 



Jclear controller 



bfc 



idle: 



in a 1 , d s t a t 
and ai,4 

j z i 11 e 



»"*ait for completion 
; reacv 



c n e c x i.o. completion ok 

in ai,rtype 

00 unlinicei i/o complete 

10 diss status cnansed 

must oe a did in ai 

test al,10D Jreaoy status cnange? 

JNZ rf HEADY 

OR AL,0 

jnz werror >some otner error, retry 

caecK i/o error bits 

in ai, r byte 

rcl al,l 

mov err_code,80n 

jb w ready J unit not ready 

rcr al,l 

mov err_code ,al 

and al,0fen >any otner errors? 

jnz werror 

read or write is ok, al contains 
ret 



01 lin^eo i/o ccmp 
11 (not used) 



wready: ;not ready, treat as an error for now 
in al,rbyte Jclear result byte 

jmps trycount 

werror: ; return nardware malfunction 
trycount: 

dec rtry_cnt 

jnz retry 

mov al,err_code 

mov an , 

mov ox,ax Jmatce error code 16 bits 

mov bx,errt bl [EXJ 



call pmsg 
in al ,cda ta 
call uconecno 
c m p a 1 , ' c ' 



fprint appropriate message 
Jflusn usart receiver buffer 
Jread upper ~ase console caaracter 

Jcancel 



je rfboot_i 
cmp al , 'R' 
je outer_retry jretry 10 more times 



cmp al, I 
je z_ret 
or a 1,255 
z ret: ret 



;i?nore error 

Jset coae for permanent error 



by 



*f boo t 1 : 



j-np WBOOT 



can't ma^e ii w/ a snort leap 



* senacom sends tne address of the iopb to ;,: 

* tne iS.BC 201 * 



*•* *»* *i* *i* *? ; r V *•* *? *•* *t* V *•* Jjt SgSigC ^8 3p SjE 5jC 3J5 ^jt 3jp^ J,i ;,i V* -»i ^,£ i,i -,* W - ,-i . ^ i,5 ;,c i^ ; ,i 9gC *,» *t* Jji ; t S ^S *, 



*l» *!•*»» *»» 



sendcom: 



MOV CL,4 

MOV AX t i;MA_SEG- 

SAL AX,CL 

ALD AX,JJMA_ADR 

MOV 10 ADRTaX 

MOV CI, 4 

MOV AX f CS 

SAL AX,CL 

ADD AX, OFFSET CHANCMD ,'ADD SEG- 6, OFFSET FOR 201 

out iiow.al 

mov cl ,£ 

sar ax, cl 

out inign ,al 

ret 



^i xfi ?? ?? ^ 5? ^ J*c ^c ^ ^c ?? 3? *? ^ ^ '|i Xfi V ^ ^ ^; ^ ;,s r,c ;?. jp ;,: 7£ v i^ ^i Z£ -^ v *n ^ £fi ~£ ^ ; ;* *£ '£ ^ ^c 

* Data Areas * 

*,* »i» ^* »|» J|» J|» «fC #»% i|« ',» »,* »,* "|» *|* J,£ £f» »,I if* «!* ij» *|* *!• J^I ^* i,» xji -K* •,» »^ »,• i|* «,% *!» #,* J,J J|* *|* #|* »^» #f» *,» # t * » t » i,» »,» 

lata offset eau offset s 



dseg 
org 



IOBYTE do 
disK db 

cnancrcd db 
io^com db 
nsec db 

trie db 

sect db 

IO_ADR DW 
dma_adr dw 
dma seg dw 



lata_of fset 




; contiguous witn coce segment 





80n 

l 




0000H 

00S0n 



JdisK nutiDer 
Jiopb cnannei word 

JnuTioer sectors to ifer 

jstart sector 

JPHTS ADDR FOR SBC201 USE 

JDMA adr (default ) 

»DMA Base Segment 



HOM COM SOU 3 

RDCO"DE EQU 4 



60 



ERR_COEE LB e fe5 H 

VRCQDE sea 5 

IF loader_bios 

> — — — 

■ i i 

> i i 

si^non lb cr,lf,cr,lf 

db 'CP/M-B6 Version 1 .0 ' , or, if ,0 

. i i 

> — — ——— — — — — —— — — —————— — — ——— — — — — ~ 

ENCIF ; loader__bios 

IF not loader_bios 

} — — — — — ■ — 

• ' ! 

si^non db cr,lf,cr,if 

db 'System Generated e4/2e/Sl' 

d b c r , 1 f f 

. i i 

» i i 

J —————————————————————— ————— ——~— 

ENDIF ;not loader bios 



int_tru db 

db 
db 



c r , 1 f 

'Interrupt Trap Halt' 
cr,if ,0 



errtbl dw er0 ,erl ,er2 ,er3 

dw er4,er5 ,er6 t er7 

dw sr9,er9,erA, erS 

dw e rC ,erD ,erE ,erF 

dw erl0 ,er20 t er40 , erB0 



er0 


db 


cr, if 


erl 


db 


cr, it- 


er2 


db 


er, if 


er3 


db 


cr.lf 


er4 


db 


cr,lf 


er5 


equ 


er0 


erb 


equ 


er0 


er7 


equ 


ere 


erB 


db 


cr,if 


er9 


db 


cr,lf 


era. 


db 


cr. If 


erB 


db 


cr,lf 


erC 


db 


cr,lf 


erD 


equ 


er0 


erE 


db 


cr.lf 


erF 


db 


or, If 


erl0 


equ 


er3 


er20 


equ 


er9 


er40 


eau 


erB 



,'Nuil Error ??',0 
, 'Deleted Record :',0 
t 'CRC Error : ',0 
,'Data Overrun-Qnisrrun 
, 'Sees Error : ',0 



, 'Address Error :',0 
, 'Write Protect : ' ,0 
, 'ID CRC Error : ',0 
, 'Write Error :',0 
, 'Sector Not Found :',0 

,'no Address Mars :',0 
,'Data Mart Error :',0 



,0 



61 



erbiJ id cr, if, 'Drive Not Ready :',0 

rtry_cnt db >dis£ error retry counter 
j System Memory Seerment Table 

segtable db 1 ;i segTtents 



iw tpa_se? 
dw tpa_ien 



tlst saz starts after BIOS 
>*and extends to 08000 



include singles. lib Jread in disfc definitions 

loc_st£ rw 32 ilocal stacK for initialization 
stfcbase equ offset s 

lastoff equ offset 5 

tpa^see* equ (lastof f +0400n+15) / 16 

tpa~len equ 0F00n - tpa_seg 

db Jfill last address for GENCMD 



* Dummy Data Section * 

?J* *l» ?l* *|S JJC ifi -,» Tft 3fi i,% J,* Sfi eifi »^S 3,t i|i *i% i|i i,i S^C »£ Jji Jj! »,* J|"I 5,S JJ5 JgC 5^5 *,5 »(• »jS *f» i^i »fJ i,i *gl *^i »,» «j£ »,» Sj5 JjC i|? 5(1 

dse? jabsolute low memory 

org ;(interrupt vectors) 

int0_offset rw 1 

int0_se^ment rw 1 

; paq to system call vector 

rw 2 r - : (bdos int-i) 



bdos_of f set 


rw 


1 


bdos segment 
END 


rw 


1 



rtry_cnt db »'dis£ error retry counter 



62 



APPENDIX B 
title 'Customize! Basic I/O System' 

v Tnis Customized 3I0S adapts CP/M-86 to 

* the following hardware coal" duration * 

* Processor: iSSC «612 * 
- Controller: iSBC 202 - 

* M emory moiei: £0^0 * 

* Programmer: M.B. Canialor v 

* Revisions : v 
>? j? 

spy y ^yy ^* y ff ff y ff yffy yy ^cyy^iyyy y sy ^yjyy ysy^y^yy ayjyjjcy ^t ^yy y^ y ^ y y 

true eau -1 

false equ not true 

cr equ 01a jcarriage return 

If eau 0aft Jline feel 

maz_retries equ 10 Ji'or disK i/o, Before perm error 

y^y y y y ^y yy y ^y y agcjjty 3jy9gtjgc > i S ^gagS3S5aiy3ip3jS3y 3 ^^ agt jgc^yy yagcy agE^jyy y ^3jgy 3y 

* Loader_bios is true if assembling tne * 

* LOADER BIOS, otherwise BIOS is for tne * 

* CP^.SYS file. * 

*n *<* 

*»C +p •»• *|» pji »|S *|S #(* *|C «|^ »!* JjS 5|* *(t J,» i|5 *|* *,t *,i *jt *,» i,% i,i *J* ifi *j* i|i *y* »|i fji ifi Zfi *g( iyC igi »j* *,« Sj* *,* «|S i,i ^i i,» *, I #|* 

L3AD£R_£I0S EQU TRUE 

blos_int equ 224 jreservea BDOS interrupt 

IF not loaler_oios 

> ———•—-— — —_— _. 

• i i 

» i i 

bios_code equ 2S00n 

ccp_offset equ 0000n 

bios ofst equ 0B06n ;BU0S entry ooint 
. i ~ i 

» i i 

i ———————————————————————————— _.—.—__ 

ENDIF ;not ioader_oios 

IF loader_bios 
• 

• i i 

» i i 

oios_code equ 1200h Jstart of LDBIOS 
ccp_offset equ 0003n ?base of CPMLOADER 
blos_ofst equ 040e>n Jstripped BDOS entry 



63 



• I I 

* I I 

» __ ————-.— _ — — _ — —_—.—._ 

ENDIF ; loaaer_oios 

csts equ eian ?I82bl status port 

cdata equ GJdSii ; lata 



r^ ;^ Tr- ^ ^ ?fi 7^ ^ ^ j? 5^ ^c j£ ^ ^-? ^* ?s r,: 5^ 3j; ^z *jz ^i a^ 2^ ^ a,; ~,c ^s ;,: 2^ ^; ;^ 5^ ;,; ^x x; ^; ~,c ;;- ?;; 5^ a^ -»- 

* INTEL iSBC 202 Diss Controller Ports -" 

5 ( * # ( t *,* f|i Ifi Tfi IfZ # t % i ( C * t * I|* •!« *ii 2|S ij* *i» *|* *,^ S|* J,J r,* *,C «|% -,» *|S »,» 1,1 *,» «|* #,i #,S »,^ 1,4 #,» ;,» *,» *',£ *,» *,* 2^ *,« 2|« -,» »,» «(i 



case 


equ 


e7Sn 


rtype 


equ 


Dase^l 


rbyte 


equ 


base+3 


reset 


equ 


tase+7 


dsta t 


equ 


Dase 


ilow 


eau 


base+1 


ini<?n 


equ 
cseg 


base+2 




or? 


ccpof fset 


ccp : 








org 


bios code 



* BIOS Jump Vector for Individual Routines * 

: ,i 2jC 3JX 5J5 ?,< >;t ^% ^ Jji ?^C 2JC ^X ^C ^C 7JC »? ^^ 5J£ ?j( JJt 3JC £jC SJC 2JC Sfi JJC 3JS 7JC Xi T^C .?£ 3JC 2jC >^* *i* ■*? *r* 3JC 1* ^? *j* *? *J* •? 

jmp INIT ;Enter from BOOT ROM or LOADER 

j-np VBOOT JArrive nere from BDOS call e 

jmp CONST Jreturn console keyboard status 

jmp CONIN jreturn console Keyboard cnar 

jmp CONOUT Jwrite cnar to console levice 

jmp LISTOUT Jwrite cnaracter to list device 

jmp PUNCH Jwrite cnaracter to puncn device 

jmp READER Jreturn cnar from reader device 

jmp HOME Jmove to tri 00 on cur sel drive 

jmp SELDS& Jseiect diss for next rd/write 

jmp SETTRK Jset tracic for next ri/write 

jmp SETSEC ;set sector for next rd/write 

jmp SETBMA ;set offset for user buff (DMA) 

jmp READ Jread a 12b byte sector 

jmp WRITE Jwrite a 128 byte sector 

jmp LISTST Jreturn libt status 



64 



jnp SECTRAN 

jnp SETDMAB 

jno GETSEGT 

j-np GETIOBF 

jmp SETIOBF 



;xlate iogical->pnysical sector 
»set ses base for Duff (DMA) 
Jreturn offset of Mem Dese Table 
Jreturn I/O map byte (I03TTE) 
Jset I/O nap byte (IOEITE) 



~ ~ :,i 5? * t * V ^ -»c 2? *P ^ 5? ^* ^ ^ v ^ 5jt ;,* ;,; ~ ;^ ^ y,s s^ 3;s Z£ ?^ 2^ ~i$ 3£ s? ~ ;,c ^; 7£ ^c 2? ^c " -^ ;^ ^ ii^ 5^ 

* IN1T Entry Point, Differs for LDBIOS and * 

* BIOS, according to "Loaier_3i os" value * 



I.N IT 



Jprint signon message ana initialize nariware 



mov ax,cs 
nov ss,ax 
mov ds,ax 
mov es,ax 
;use local 



>*e entered 
jCS: as tne 



witn a JMPF so use 
initial value of SS 



> DS ! , 

Jand ES 
stacK during 
nov sp,offset stxoase 
eld jset forward direction 



initial! zation 



IF 



not loader bios 



» 1 



» 1 



; Tnis is a BIOS for tne CPM.SYS file. 
; Setup all interrupt vectors in low 
', nemory to adiress trap 



;save tne DS register 
Jclear IOEYTE 



pusn ds 

mov IOBYTE.tf 

nov ax , 

mov as, ax 

mov es,ax Jset ES and DS to zero 

; setup interrupt 'I to aaaress trap routine 

nov int0_off set .offset int_trap 
int0__segment ,CS 
di ,4 

;tnen propagate 
Jtrap vector to 
»aii 256 interrupts 
proper interrupt 



mov 
nov 
mov 
mov 
rep 



si,0 

cx.bltf 

movs ax.ax 
JBDOS offset to 
mov bdos_of f set , bdos_of st 
pop ds Jrestore tne DS register 



(additional CP/M-SS initialization) 



ENDIF Jnot loader_oios 
IF loaaer bios 



b5 



1 I 



» I 
} 



;Tnis is a BIOS for tne LOADER 

pusti is >'save data segment 

mov ax,kJ 

mov Is, at »point to segment zero 

JBDDS interrupt offset 

mov blos_off se t , nios_of s t 

nov bdos_seg-ment ,CS »Ddos interrupt segment 

(additional LOADER initialization) 

doo ds Jrestore data see^ent 



ENDIF 



»*loaaer oios 



-nov ox, offset sign on 

call pms? Jprint sienon message 

mov cl,0 jdefauit to ar A: on coidstart 

jmp ccp »jump to cold start entry of CCP 

WfiOOT: jmp ccp+6 Jdirect entry to CCP at command level 

IF not loader Dies 



JDIock interrupts 



int_trap: 

cli 

mov ax , cs 

mov ds,ax »get our lata segment 

mov bx, offset int_trp 

call pmsg 

tilt Jnardstop 

• i 
> i 

• —— ■-- 



ENDIF 



;not loader Dios 



->■» *i* »,» rf+ »,» *y» *t* 1* *T* *1* *t* *1* 'i* *I* *i* *l* *I* *i* *|* *i* *f* *|* *i* *i* T* 'i* 'I* "t* 'l v *** 'I* *l* *«* *•* *»* *l* 'I* "l" *I* 'I* '■" 'i* '1* ■"•* "'" 

* CP/M Cnaracter I/O Interface Routines * 

* console is US ART (i«2blA) on iS.BC b612 -" 

* at ports De/DA * 

;,; .,i *,;;,; ^; ;,; ^; ^c ^; ;,; ^; ; ( ; ;,; ;,; 2gS J{C »|C ;,i i,» -,c ;„£ ;,s ^i 2J3 -,; -^ -^ ;, ; -,t ^ ^ « # ; ^s - ,; i, t ;,i *i% ;,; # ( c ^,i ^, ; - ,c *,; ;, ; ?;% 



CONST: 



; console status 



in ai ,csts 
and a 1 , 2 
jz const_ret 
or al,2bb 
cons t_ret: 
ret 



jreturn non-zero if raa 
;rcvr data available 



66 



COM IN : 



call CONST 
jz CON IN 
in al t cdata 

and al,7fn 
ret 



> console input 

Jwait for RDA 

;read data 5, renove parity bit 



CONOUT: ^'console output 
in a 1 , csts 
ani a 1 , 1 
jz CONOUT 
-nov al ,ci 
cut cdata, al 
ret 



» e e t console status 



Jtransmitter buffer is empty 

Jtnen return data 



LISTOUT: 



LISTST: 



PUNCH: 



READER: 



ret 



ret 



;iist device output 
»aot implemented 



;pcli list status 
»not implemented 



Jwrite puncn device 

»'not implemented 



mov al.lan 
ret 



GETIOBF: 



MOV AL,B 

ret 



SETIOBF: 



ret 



;return eof for now 



JIOBYTJE NOT IMPLEMENTED 



Jiobyte not implement ea 



; Routine to get and ecno a console cnara~ter 
» and snift it to upper case 



uconecno : 

call CONIN 
pusn ax 
mov cl,al 
call CONOUT 
pop ax 
cmp al, 'a' 
jb uret 
cTip al, 'z ' 
ja uret 



jg-et a console cnararter 

Isave and 

Jecno to console 



Jiess tnan 'a' is oz 



Jereater tnan z is oi 



67 



uret : 

D m S ? J 



sud al , a -A 



ret 

Tiov al, [iJXJ 
test al ,al 
jz return 
mov CL,AL 
call CO.NOUT 
inc 3X 
jiips pmse" 



»»* *i» i* *«* *i» »•* *»* 



■ #|* »,» *i» #|* *,» *,* *|* * 



;eise sftit't to caps 

jgst next cnar from message 

J if zero return 

» o r i n t it 

>next cnaracter am loop 

> »,» »|» ^« »,* »|» »,» *,» *■(* ^» J|* lg* iji *,% »,» »,» »,» »,i *|* »,« »[• »,* »,» »,* 



Eiss input/Output Routines 



*i* *fi* V *B* *i^ *5^ *? ^? V t* t* *«* *5* t* *9* *B* *9* ^* *B* *i* *ff V T* V *!* *t* *** V *<* t* *? *i* *5* *i^ "P *** *5^ *<* ^* V *i* *? *•* t* *<^ 



SELDSK: 

n d i s fc s eau 



Jseiect diss ^iven by register CL 
'£ ; number of lists (up to lb) 
•nov dist»cl fsave diss number 

; ready for error return 

Jn beyond, max disss? 

» return if so 

; a o u b i e ( n ) 

J D x = n 

» ready for *16 

; a - n * 1 6 



mov bx , MWn. 

CTip cl,nd isics 

jnfc return 

mov c a , 

mov bx , ex 

n o v c 1 , 4 

sal bx.ci 

mov ex, offset ipDase 

add ex, ex fdptase + n * IS 

return: ret »dx = .dpn 

HQ^IE: Jmove selected diss to nome Dosition (TracK U) 
mov i o_com ,nomcom 
mov trfc ,0 
call execute 
ret 

SETTRK: Jset tracK address ?iven by CL 
tiov t r £ , C L 
ret 

SETSEC: J set sector number 2iven by el 
mov sect , CL 
ret 

SECTRAN: Jtranslate sector CX usine- table at IDXJ 
mov ca,0 
mov bx,cx 

TEST DX,£tf »IS THERE A SKEW? 

JZ NO SKEW ill NOT, RET 



as 



NO SKEW: 



add bx , dx 
tov bl , [.bx] 

ret 

ADD 3X,1 

RET 



;ada sector to tran table aidress 
fsei logical sector 



SBTDMA: J set DMA offset given by CX 
mov dma_adr,CX 
ret 

SETDMAB: Jset DMA. segment given by CX 
mov dma_see,CX 
ret 

GETSEGT: Jreturn aadress of pnysical memory table 
mov bx, offset se?_ table 
ret 



-,% *\» *(• »,» »,* ',» V|« ""i* »i» •*(• fta *»» •»,» »,» »i» »|» *|I i|» *.i *f» ^i *|' *|* *|« *,* •(• ij* *,* * t » J^C -,C »,* »,* »,« i,C # ,i i, J «fX ^ ^",i ifi *,C 



V 



All diss I/O parameters are setup: 

is dist number (SELDS£ 
is traoK number (SETTRK 
is sector number (SETSEC 
IS THE PHYS ADDR FOR DMA 
is tne DMA isb offset 
tne selected sector to tne D 
adaress, and WRITS writes tne data from 
tne DMA. address to tne selected sector 



DISS 

TRK 

SECT 

I0_ADR 

BMA_ADR 

READ reads 



'r- 


3{6 5|S 




V 




sje 


) 


V 


) 


n< 


) 


V 




^» 




V 


M 


A- 



^X ^ ^t ^C 3^ J^C Jjt ^C J?C ^£ -^ ^ •"? JJ^^CJJK 3^C JQC V^^*|S^^^^V^V^^^V*«*^»i**i i *i*V''i 5 *f*-i Si i* ; < t *»* 



READ: 



WRITS 



mov cl t 4 
mov al.diSK 
sal al,ci 
or al,rdcode 
mov io_com,ai 
jmps execute 



mov cl,4 
mov alfdisK 
sal al f ci 
or al.wrcode 
mov io com.al 



^combine diss selection 
; w i t n opcoae 

Jcreate iopb 



Jcreate iopb for write 



EXECUTE: 



outer_retry : 



69 



lov rtry_^nt ,max_retries 



retry: 



in al,rtype 
in al , rbyte 
caii sendcom 



Jclear controller 



idle: 



in a 1 ,istat 
and al,4 
j z i a l e 



Jwait for completion 
» r e a d y 



cnecK i.o. completion ox 

in al,rtype 

00 unlinked i/o complete 

10 disk: status caanged 

must be a 00 in al 

test ai,i0b Jready status cnange? 

JNZ WP.KADT 

OR AL,0 

jnz werror jsome ctner error, retry 

cneca: i /o error bi ts 

in a 1, rbyte 

rcl al,l 

mov err_code ,30ti 

jb wready Junit not ready 

rcr ai , 1 

mov err_coae ,al 

and al,0feh Jany otner errors? 

jnz werror 

read or write is ofc, al contains 
ret 



01 linked i/o comp 
11 (not used) 



wready: Jnot ready, treat as an error for now 
in al,rbyte Jciear result oyte 

jmps trycount 

werror: ^return naraware malfunction 
trycount: 

dec rtry_cnt 

jnz retry 

mov ai,err_code 

mov a n , 

mov bx,ax »mate error code 15 tits 

mov bx ,errt bl [BXJ 

call pms? Jprint appropriate message 

in ai,cdata jflusn usart receiver buffer 

call uconecno Jread uooer case console cnaracter 

cmp al, C 

je w c o o t _ 1 t cancel 



70 



z ret : 



cnp al , 'R ' 

ie outer retry 

cnp al, I 

je z_ret 
or al ,255 

ret 



; re try 10 no re tines 

Jignore error 

Jset cole for remanent error 



w b t 1 : 



j nnp tffOOT 



; can't na^e it w/ a snort lean 



;,* * t « «P i,» »,» »(• -,» *|» *|% »i^ J|» i,» *|* *|« »,£ #(* »|» #j» »|* *|» *,« S|« •(• »,» «•,> »|» #g» *,» »(i i^i *^» »(* »,£ »,» *|* *|» 3|% *,» *,* *|* *■,■» »|» *|» »^» rfi «,-. #|* »|» »,* 

* sendcoTi send? tne address of tne iopb to '" 

* tne iSEC 202 

-,* 2JC *^» 3J5 *|* »(* 5JC *t* ■!* ^^ ^^ "1* ^^ T* *r**f* *f* *t* *S* *p A* *i* *t* "t* *? t* *r* *? *J* *i* *i* *i* 3p *f» »JI »|^ ?!% »jC J^S » ( * ?j» *^C Jj? ?(* J^C J|Z J,i y,J 7p 



senlcom: 



MOV CL.4 

MCV AX,DMA_S£G 

SAL AX,CL 

ADD AX,DMA_AER 

MOV I0_AUR,AX 

MOV CL,4 

MOV AX.CS 

S \L AX CL 

ADD AX | OFFSET CHANCMD J ADD SSS S OFFSET FOR 2^2 

out ilow, al 

mov cl,9 

sar ax,cl 

out inien.ai 

ret 



"• Data Areas :,: 

*f* *|* 7J» 3|» *|* 5JC *|*. 3JC 7^* >i* »j* ?[J *5* *i* *? 1* *? *JS *3* *T* *i* *S* *3* *9* *f^ *J* 1* *P *t* *i* *p *<* ^f» *r* *i* »i» *i* *? *i* ^i* *i* *»* *^ *i* *i* 

lata offset equ offset s 



dse? 

r? 
I0BYT5 db 
diss db 

cnancTid db 



nsec 

trie 

sect 



db 
db 
db 



jcomiffuous witn code segment 



lata of fset 



r'lisK number 

90n Jiopc cnannei word 


1 inunber sectors to xfer 


; s tart sector 



71 



IO_AER Frf 

lTia_adr iw 
irra se? dw 



eee^H ;prys addr for sbC202 
009_n ;1 M A adr (default) 
tf t'D^A Base Segment 



US. 



H0 v 1_CO v l SOU 3 
RPCOD- EQU 4 
ERR CODE DE etfH" 
WRCODE ECU 5 

IF ioaier_bios 

• ___________________________________ _______ 

. i i 

1 i i 

si 2ii on ID cr,lf,cr,lf 

db 'CP/K-b5 Version 1.0',cr, if ,_■ 

. i i 

> i i 

» —————————————————————— — — — 

ENLIF ;ioader_bios 

IF not loaler_bios 

• ______________________________ _ _ ___ 

. i i 

» i i 

si^non dd cr,if,cr,if 

db 'System Generated 05/25/Sl' 

d b c r , 1 f , 

. i i 

» I ! 

i ————————————— — — ____—__—_—_____— — ___ 

ENDIF ;not ioaier_bios 

int_trp lb cr,if 

db 'Interrupt Trap Halt' 
d b c r , 1 f , 

errtbl Iw er^: , erl ,er2 ,er3 
dw er4, er5 ,er6 ,er7 
dw er8,er9,erA,er_ 

dw e rC ,erD ,erE,erF 

dw erlfef ,er2tf ,er4iJ ,er_0 

era db cr, if, 'Null Error ?Y',0 

erl db cr, If , 'Deleted Record :',0 

er2 db cr,lf,'CRC Error :',0 

er'i db cr, if, 'Data Overrun-Unierrun : ' ,0 

er4 db cr t if » 'Sees Error :',0 

er5 equ er0 

ert> equ er0 

er? equ erfe! 

er3 db cr, If , 'Address Error :',0 

e r ^ db cr, If, 'Write Protect : ' , 2 

erA db cr,lf,'ID CRC Error :',^ 

er3 db cr, if, 'Write Error :',0 

erC db cr, if , 'Sector Not Found :',0 



7? 



erD 
erS 

erl2 



equ er0 

db cr,if ,'i\o Actress M ar;{ :',£ 
ds cr,lf ,.'Bata Marx: Error :',0 
equ er3 



er^0 equ er9 

eri0 equ er£ 

erHtf aD cr, If, 'Drive Not Ready :',z 

rtry_cnt db >dis£ error retry counter 

; System Memory Segment Tacie 

segtable do 1 ;i segments 



dw tpa_se? 
dw tpa_ien 



Jlbt ses starts after BIOS 
;and extends to £8000 



INCLUDE DOUBLE. LIB 



JREAD IN DISK DEFINITIONS 



loc_stX rw Z'd > local stacK for initialization 
stSbase equ offset 3 

las toff equ offset S 

tpa_?ee- equ ( lastof f +0400n + i:o) / 16 

tpa_ien equ 0E00a - tpa_seg 

db 2 Jfill last address for GENCMD 



^,* *^ Jp »f» *|» rf% *f» *f* 5JC «-j» #,» «>,■» *•,! * p *,S *(» «|* ay* #|* ^)* .. ,i 2jp ^j-* JfC r|* * ,» *j* I|I *-f» i,i *(» *,i *j* ^,» «■,£ »,» ?,■» ^J* J|« ?!* »f» 3p *|» *,» J|» 

9 Tummy Data Section * 

•i* •«* •«* •«* *** *i» *i» *i* *? *i* 'I* »■- *i* •»» *i* *i* V V *»* *i* "•* *i* *»• *i* *** 'I* *■* *i* *i* *i* *•* "»* *i* *•* *•* ••* *<* *«* *»* *•* *•* *•* *»* *•* *i* 

Jatisolute low memory 

;(interrupt vectors) 

1 

1 
pad to system can vector 
rw H^lbdos int-l) 



dse? 





org 





intZ_of f set 


rw 


intB segment 


rw 



Ddos_offset rw 

bd.os_se,ment rw 

END 



1 
1 



rtry_cnt dD e ;aisfc error retry counter 



73 



.PPEu'DIX 



ROM bootstrap for CP/ M -=6 on an iS*C~5/12 
witn tne 
iS.BC 201 *. 202 Floppy Lis* Controllers 



Copyright (C) 1980,iy«l 
Digital Rssearcn, Inc. 
Bex 579, Pacific Grove 
California, 939 be 



E •*% *,* *,» *,» •»* #,* *i* *,* -,» 

: Tnis is 

: in tne 9 

'• tne m o n i 

: tnen con 

: 'Vffd4:0 

; a copy o 



■ iyw »,» i,» #|* ^,i »!» v ( * *j» .,% *|S . 



I #1* *,» «l* »J* ■ 



f 

t i o n 0000 
s 

? 

2 

n 
n 



* register 
•'•'• various 

- 3LC B6/1 

v serial i 

* baud asy 
" terrupt c 
i? rupts 10K 
* v and edge- 

* terrupt) 
v masiced-of 

* controlle 

* sector 1 

* paragrapn 

* tne LOADS 

* tracx 1 s 

* target ai 
~ to LOADER 

* contain 

* ROM l con 

* ROM uses 

* (absolute 
r,: tne secto 



7 71 

or 
rol 

• 

it 
0E, 

an 
eri 

ar 
ter 
enr 

ont 
-17 
tri 

mod 
f . 
r i 
is 

ad 
R o 
ect 
d r = 
• 

s t 
tai 
RAM 

) f 

r 1 



iiOOT 

onito 

must 

pass 
Fi rst 
s dat 

tnen 
d tne 
pnera 
e ini 
face 
onous 
rolle 
H (ve 
ggere 
s wit 

Next 
s ini 
real 
dress 
n tra 
ors 1 
ss . 
ROM 
ne ev 
ns t h 

Detw 
or a 

BUff 

BjCSgC JJ5 Jp 5£ 



ROM wn 
r. To 
be bro 
ed by 
, tne 
a area 

initi 

st acx 
1 inte 
tializ 
is con 

termi 
r is s 
ctors 
d auto 
n ail 
, tne 
tiali z 
to det 

for L 
C£ s 
-25 is 
C o n t r o 

en men 
e odd 
een 40 
scratc 
er . 

*i* **i* *i* *^ *fi on 



icn 
exe 
ugn 
tne 
ROM 

to 
all 

po 
rfa 
ed. 

fig 
nai 

etu 

at 

-SO 

int 
201 

ed, 
erm 
OAD 
ect 
re 
1 t 



is r 

cute 

t on- 

conm 

mo ve 

RAM 

zes t 

inter 

ce en 

Tne 
urea. 
, and 
o for 

4240 

1 (en 
errup 
-24 2 

and 
ine t 
ER. 
ors 2 
ad in 
nen t 



esid 
tne 
line 
and 

5 

at l 

ne s 
. T 
ips 

fc2b 
for 
tne 
int 
H-00 
1 of 
t le 
Diss 
trac 
ne t 
Flna 
-2b 
to t 
rans 



fa <-> t 

boot 
and 






oca- 

e ?me 
ne 

on t 
1 

a 95 
in- 

er- 

05FH 

i ri- 
ve is 
ette 
jc 
arge 

117, 

and 
ne 
f ers 



nt : 

ne ; 

00 ! 

) : 



ory locations, and 9 
addresses. SOOT * 
000H and 0e0FFH - 
n area, aion^ witn* 

*,S 3JC >,* 7J% 7J» ^£ 3JC 2f* XjC *t? 5JC 5J6 7JC i^% «-,» J^S 2jC J^S Xfi 



cr 

If 



equ 
equ 



1,5 
10 



distc ports and commands 



74 



equ 


078n 


equ 


base-^1 


equ 


Dase+ii 


equ 


base+7 


equ 


base 


equ 


base+1 


equ 


base+2 



console baud rate 
te equ 962 fc' 

for B253 taud counter 

equ ?SB/(baud rate/120) 



euu 
equ 

equ 
equ 
equ 
equ 

equ 
equ 

eau 

SOU 



J1B251 sicius port 
; lata port 



0DAn 
0E8n 

0D0n ;~2b3 PIC cnannel port 

tc&0+2 ;cn l port 

tc n0+4 ' f c* 2 port 

tcn0+b JB253 command port 



base 
rtype 
rbyte 
reset 

dstat 
ilow 

inign 

» 

Jactual 

oaud_ra 

lvalue 

baud 

csts 

ciata 

t 

tcn0 

tcni 

tcR2 

tend 

icpl 

icp2 

secsec 

f 

RO^SEG 

» 

cse? romse? 
J 
.First, move our data area into RA!* at 0000:0202 

Tiov ax ♦ cs 

mov ds,ax Jpoint CS to CS for source 

mov Sl.dromoegin fstart of data 

mov DI , offset ram_start » offset or destination 

mov ax f 

mov es,ax destination segment is 0000 

mov CX,da ta_lensrtn >how mucn to move in bytes 

rep movs al,ai Jmove out of eprom a byte 

» a t a time 



0C0n 
0C2n 

2cSn 
0FID4H 



;8259a port 
;8259a port 1 

Joffset for i r a c K 1 



idata segment now in RAM 



mov ax , 

mov ds , ax 

mov ss.ax 

mov sp, stacK_of fset initialize stacir segment/ 

; pointer 
eld ;ciear tne direction flag 



7 b 



Setup trie 3259 Programmaoie Interrupt Controller 



7iov al , 13ft 
out icpl ,ai 
tiov al,10n 
out icp2,al 
tiov al,iFn 
out icp2,al 
mov al,0FFh 
out icp2,al 



»*«25ya ICW l d0B6 mode 
Jb2 59a ICW 2 vector (? 40-5F 
;«2 59a ICW 4 auto 501 master 
JH2bya OCW 1 mastc ail levels off 
Reset and initialize tne 201/202 Diskette Interface 



restart: Jalso come oacx cere on fatal errors 

in al,rtype >*clear status type register 

in ai,rbyte jclear status register 

out reset, ai Jreset diskette system 

nomer: mov BX, offset borne 

CALL execute ;ncme drive 

mov bx, OFFSET sectorl Joffset for first sector D^A 
mov ax.bx ;enter in packet 

mov bx, offset read0+5 ; t 

» 



mov l b x ] , a 1 

inc bx 

mov [bx J ,an 

mov bx, off set read0 

call execute 

mov es , abs 

mov ax,es 

mov c i , 04 

sal ax.cl 

-nov bx, offset readl+b 

mov [bx J ,al 

i nc ox 

mov [bx J , an 

mov bx t offset readl 

call execute 

mov cl,04 

mov ax,es 

add ax,secsec 

sal ax,cl 

mov bx, offset read2+£ 

mov [bxj , al 

inc bx 

mov [bx J ,an 

mov bx, offset read2 



JpacKet now complete 
Jpacxet location 

Jsend packet 

;se?ment loc for LOADER 

Jmust translate to 16 bit ans 
Jaddr for diskette controller 



; enter in packet 

; read t racK 

; compute offset for tracx 1 



76 



call execute 

mov leap_se & -rrent ,es 

; setup far jump vector 
7i o v i e a p_ offset, 2, 



read t r a c £ 'd 



prSi? : 



enter LOADER 

jmpf iword ptr leap_offset 

^iov cl , [BXJ 
test cl ,cl 
jz return 
call conout 
inc EX 
j mp pnss 1 



COQOUt 



c o n i r. 



in a l , c s t s 

test al ,1 
jz conout 
Tiov al , cl 
out clata,al 
ret 



in al.csts 
test al ,2 
jz conin 

in a 1 t cda ta 
and. ai f 7Fn 
ret 



execute: 

retry : 

in a i , r t y p e 
in a 1 , r Dy t e 
call send. com 

idle: in ai f dstat 
and al,4 
jz idle 
in ai.rtvpe 
test al ,2 
jz intcmp 



> retry if drive not ready 
i clear controller 



,'system status 

jsystem awaiting mterupt 

fcneci drive status 



J I/O NOT COMPLETE, THY AGAIN 



77 



in temp: in al,rbyte 

Jul a 1 • x 

jae iocmp 

RCH AL,l" 
jmp fatal 
i o c m p : r ~ r a 1 « 1 

and ai,fcjfen 

jz return 
J^.P RETRY" 



lie is ccrolete set status 



ratal: 



; restore 
> a n y errors 



; ratal error 
m o v c 1 , '£ 
RCR AL,1 
inc cl 
TEST AL.tfl 
j 2 f t e s t 
m o v a l , c l 
m o v a n , i6 
ADE AX, AX 

•nov &x,ax ;.ma£e 15 bits 

rov bx, errt Dl [EX] 
print appropriate error message 
call pmsg 
call conin » wait for xey s 



pop ax 

jmp restart 



» discard unused 
? t .1 e a start all 



triie 

item 

over 



return 



s end cot 



PET 



; return 



■on EX. 



Jroutine t 
mov ax, bx 
out i 1 o w , a l 
mov cl,K9 
sar ax,ci 
out inign,ai 
ret 



send a comrand strin? to 201/221 



; packet aidr 



Inaee of data to ce moved to RAM 



dromoeein eau offset $ 
t 

m 

i 



78 



crealst ri n? 



155 

lb 

ID 
ID 
ID 

lb 



een 

1 
Z 
1 





parameter oiock iocw 
reac function coie for drive 
fc sectors re real 
tracK # 

start witn sector 1 
will contain lower byte aidr 
UDcer 



creaitr*0 



ID 

lb 
lb 

ID 

lb 
lb 
lb 



80 h 

4n 
25 


d 





real multiple 
# sectors to real 
tracK 
start »fi tn 2 
aur for tracx 



•^es nere 



creadtrcl 



lb 
lb 
lb 
l b 
lb 
lb 
lb 



b0n 

4.i 

26 

1 

1 





sectors 
trace # 
start witn 
alir lsb 

ailr ns c 



sector 1 



cftoTieK 



lb 
DB 

ib 
lb 
lb 
lb 
lb 



Ben 
03 H 




cerrtbl 



Cer0 

Cerl 

Cer2 
Cer3 
Cer4 
Cer5 
Cerb 
Cer7 



Iw 
1* 
iw 
iw 
Iw 
Iw 
iw 
dw 

ib 
ib 
ib 
ib 
ib 
ib 
ib 
ib 



offset 
offset 
offset 
offset 
offset 
offset 
offset 
offset 



er0 
erl 
er2 
erd 
er4 
e r 5 
erb 
er7 



cr, if, 'Null Error ??',0 
cr,if,'CRC Error', k 
cr t if,'Seex Error',0 
cr ,if , 'Aliress Errcr',0 
cr,if , 'Data Over run-Under run' ,0 
cr , if , 'Write Protect', 
cr, if, 'Write Error',0 
cr, if, 'Drive Not Ready'.e 



dromeni equ offset $ 



79 



» 

lat 

» 



raT] 

rea 

rea 

nom 

err 

ertf 

erl 

er2 

er3 

er<i 

er5 

erb 

er7 

» 

lea 

lea 

> 



a_leiifft!i 



rese rve 
(no h e x 

dseg 
o r? 



_start 
14? 
11 
d2 

t Dl 



p_of fset 
p_ segment 



stacs_of f set 

» 

J 

sectorl 

Ty 

Leu 

ADS 

Min 
*ax 



equ iromena-iroi De?in 

space in RAM for lata area 
re c oris srenerated nefe) 


0200ft 



equ 

rfc 
ro 
rb 
rw 
rt 
rfc 
rfc 
rfc 
rfc 
rfc 
ro 
rb 

rw 

rw 



rw 
equ 



$ 

7 ; real tra~£ sctor 1 

^ ,'reai 

7 J read 

7 ; ft one 

e 

lengtn cer0 
1 e n 2 1 ft cerl 
lengtn cer2 
lengtn cer3 
lenstft cer4: 
lengtn cerb 
lengtn cerb 
len<?tn cer7 

1 
1 



32 J local sta?K 

offset SJstacK from nere a own 



ira^s se* 
T0 S2-26 
Tl Sl-26 
irive 

;ie 



;i4 

;n 
;i5 

;i7 



T0 51 real in nere 
equ offset s 



rb 


1 


rw 


1 


rw 


1 


rw 


1 


rw 


1 


enl 





;A5S is ail we car° about. 



80 



APPENDIX D 
lille 'cZee Dis* I/O Drivers' 



■ i» *•» *i» *•* *»» »•* *r '<* * 






■- 



Basic Input/Output System (BIOS) for 
C?/M-9o Configured for iS3C 86/12 vi 
the iSBC 2P4 Floppy Diss Controller 

(Note: tnis file contains Dotn emoe 
tans and. Dianas to minimize tne list 
wiatn for printing purposes. fou ma 
to expand tne slants before performi 
-na jor edi ti ng. ) 



ta 

d i 
f 
y 

n? 



ea 

iie : 
wisn : 



!?'i ! ^~5i'"^~1« ; ? ; 



B «-j» if* *l"* "I* '1* *|* *|* f> -J* ?;^ *|» * 



*i* 5|? ?)C ?Js JJC JJC ?j* 5jC ?J» *(C JjS ?JS Jji *,* 5J5 3JS *J5 7J» J,C . 



Copyrig.it (C) 1980,1981 
Digital Researcn, Inc. 
Box 579, Pacific Grove 
California, 93950 

(Permission is nereoy granted to use 
or aostract tne following program in 
the implementation of CP/M, MP/M or 



CP/NET for 
process or ) 



tne 8086 or '6tf%~ Micro- 



true 
false 



= qu -1 

equ not true 



• C * t » »!» #,» r\+ » t » #,* »,» Jji »,» ff» 5|? #|* !,» »,»»,» »^% *j» »|J * ( t »,C *j% J|» # t » »,» ?|» ^i *|* *(» Z|» »i» »t* *** *|» *t* *!**»* "i" »|* "** *I^ *(* 'l* *t* *»* 

* Loaier_tios is true if assembling tne ••* 
v LOADER 31 OS, ctnerwise EIOS is for tne 

* CPM.SYS file. Blc_list is true if we 

* nave a serial printer attacned to BLCB538 :? 
; - : Edos_int is interrupt used for earlier * 
^versions. ;,t 



'•*•»»* i* *»• * 



• *i* *»* *i* nr i* 



ioader_bios 

Dic_list 

Ddos_int 

IF 



l ^i« *,* *,5 ;,i ij* *,» J^» S,C *i« *»% *(• 3J* 5|» #|» ?ji pjE «|» *,» »i» «|» »,i #j» *,» »,* » ( » *,* *i» *|» * ( » *(» 

equ false 

equ true 

equ 224: Jreserved EUOS Interrupt 

not loader Dios 



» i 



81 



bios_code 
ccp_of f set 
*dos ofst 



equ 250fcJn 
equ tilt £l£n. 
equ 0B06n i 3D0S entry point 



» i 
J — 



EN LIT Jnot loader_Dios 
IF loader bios 



♦ i 

bios_code 
ccp_of fset 

fclOS_Of St 

• I 

» I 



equ I2e0n Jstart of LD3I0S 

equ 0003n » Dase of CPMLOADEH 

equ B4'/6r. ; stripped BBOS entry 

i 



ENDIF 



cs ts 

ciata 



IF 



; loader_bio s 

equ 0DAfi » ib251 status pert 
equ fcJDdfl >' lata port 

Die list 



» i 

lsts 

liata 

Dlc_reset 
• i 

> i 



equ 41n J2651 No. 45 on BLC8b38 status port 
equ 40h > lata port 

equ 50n ; reset selected r JSARTS on BLCBtD3S 



ENDIF 



; cic list 



;,» i,i #|S -,£ 2|C i»S ;,I J,J i^ i»i ^i i^ i,i -,J *^C ^i ^- Zj£ 2£ i,S »,? #J» S^i J|» ',» V V *>* "l* V '(• 'l' '.• *«» *•* *»* *t* *«* *»* *•* *l* *i* *l' *1* *t* 

* Intel iSBC 224 Diss Controller Ports * 

^^c^£3^^c^C3p?^]p^c^c j$s i^ r^ ^ ^ ^ ^ ^,c ^ ^ ^: 3^ ;,x ^c i|s ^c a^ j^ j,c ^s ^t ^; ; ,i 3^ ;;c 3^ ^; ^i ^c r ( ; ;,£ >^ ;,« ^i 



base204 


equ 


Kaon 


JSBC204 assigned address 


fie cot 


equ 


base204+0 


,'8271 


FDC out command 


fdc star 


equ 


nase204+0 


;a27i 


in status 


flc parm 


equ 


Dase204+1 


J 8271 


out parameter 


fie rslt 


eau 


base2£4+l 


;827i 


in result 


fie rst 


equ 


Dase204+2 


J8271 


out reset 


dmac adr 


equ 


Dase204+4 


;8257 


DMA Dase address out 


dmac cont 


eau 


base204+5 


J8257 


out control 


dmac scan 


eau 


oase204+6 


JB257 


out scan control 


dmac sadr 


equ 


oase204+7 


;8257 


out scan address 


dnac mode 


equ 


oase204+b 


»S257 


out mode 


dmac stat 


equ 


Dase204+8 


J8257 


in status 


fdc sel 


eau 


Dase204+9 


;fdc s 


•elect nort (not used) 


fie segment 


equ 


case204+l0 


fse^ment address register 



82 



rese t_2i)4 

max_retries 

CT 

If 



equ Dase204+15 ;reset entire interface 



equ ltf 

equ i?ia 
equ tfa& 



>max retries on lisK i /o 
; oet'ore perm error 
Jcarriage return 
fline feel 



o re 



ccp: 



ccpoffset 
bios coae 



org 

^s jf. sp ^e ^t jp jp nt t« *<e sc 3= *< * V *e J? *e J? ^ *s V t« flt * * jjs ^s ^ sp 9 ff ^ ^ =? ^ V V ^ J* =? V ^ f * 

* BIOS Ju-np 7ector for Iniiviauai Routines ;,: 



j^p 
j-np 
jmp 
J"np 

JTIP 

jmp 

j"np 
J^P 

J^P 

jmp 

J^P 
J^P 
J^P 
J^P 

jnp 

J^P 
jmp 
jmp 
J^P 

JT1P 



INIT 
WjBOOT 

CONST 

CONIN 

CONOUT 

LISTOUT 

PUNCH 

READER 

HOME 

SSLDSS 

SETTRi 

SETSSC 

SETDMA 

READ 

WRITE 

LISTST 

SECTRAN 

SETDMAE 

GETS EST 

(xi'TlOBF 

SETIOBE 



Snte 

Am 

retu 

retu 

writ 

writ 

writ 

retu 

nove 

seie 

set 

set 

set 

read 

writ 

retu 

xiat 

set 

retu 

retu 

set 



r fr 
ve n 
rn c 
rn c 
e en 
e en 
e en 
rn c 

to 
ct d 
t rac 
sect 
off s 

a 1 
e a 
rn i 
e 10 
seg 
rn o 
rn I 
I/O 



om £ 

ere 

onso 

onso 

art 

arac 

a rac 

nar 

trK 

iSK 
IE fO 

or f 
et f 
2b c 
12b 

ist 
cica 
case 
f fbe 
/O m 
nap 



OOT RG 
from B 
le Key 
le xey 
o cons 
ter to 
ter to 
from r 
450 on 

for n e 
r next 
or nex 
or use 
yte se 
Dy te s 
status 
i->pny 
for o 
t of M 
ap dv t 
byte ( 



M or 

DCS 
Doar 
ooar 
oie 
lis 
pun 
eade 
cur 
xt r 
to./ 
t rd 
r du 
ctor 
ecto 



LOADER 
call fcj 
d status 
i char 

lev ice 
t device 
en device 
r device 
sei drive 

1 /write 

write 
/write 
ff (DMA) 



sicai sector 
uff (DMA) 

em Desc Table 
e (IOirTE) 
I3BTTE) 



^ ^ 7£ V ^ ^ Zfi ^ ^i ^5 ^C ^ ^ Jp ;JC ijt J? J£ ;* ^ ^ -V '? 2? 3? ^ V *r -i= *? -* 5 s *>* n" & =£ V ; r^ ■=? ; .» n* *?= -i» -^ *,« 

* INIT Entry Point, Differs for LDBIOS and * 

* BIOS, according' to "Loader Bios" value * 



T 1* »»* "I* *»* •»» 1* *!• 'I* *l* -•* *l" » 



• »,» iyl *(• *j? *|i *,i *|* »,» *|i *|% -i* *|* i|* »ji *(S *^» #|« »g» »|C *|i *j» 5jC »,» *(5 »,» »,C *f* »,» »|» »,i « ,i * 4 » 



INIT: 



Jprint sienon mesbaee and initialize nardware 
mov ax,cs « wp pntprpn with a JMPF <;o n? 



mov ss , ax 
tiov ds,ax 



;we entered 
,* CS: 



witn a JMPE so use 
as tne initial value of SS:, 
DS : , 



E'6 



mov es.ax ; and ES: 

fuse local stacx during initialization 

mov sp, offset st&oase 

oil net forward direction 



IF 



not loader bios 



» i 



; Tnis is a BIOS for tne CPM.SYS file. 
; Setup ail interrupt vectors in low 
; remory to address trap 



pusn as Jsave tne DS register 

mov a x , ft? 

mov ds . ax 

mcv es,ax ;set ES and DS to zero 

Jsetup interrupt to address trap routine 

mov int0_of f set »of fset int_trap 

mov intersegment ,CS 

mov di , 4 

Jtnen propagate 
Jtrap vector to 
fall 256 interrupts 
proper interrupt 

mov bdos_of f se t , bdos_of st 

pop ds jrestore tne DS register 



mov si ,0 
mov ex ,510 
rep movs ax, ax 
;hbdS offset to 



SfCSyC JJS *fi 5JC 3JC 3flC 5gC ^S ?Jt SjS ; ,1 XC J£S 3j6 ^€ ?J5 9JC 5jl 5JS 5? 3JC JJt 3jS ^C 5JS 5J5 9fC ?£ Zfi J|C ?»I JJS J",* ?JS 3|; ^S J",5 5*,i ?,* ^S 5JS 5^S J^ J 5|* 

* National "tLC B53B" Cnannel iJ for a serial* 
-" 9600 baud printer - tnis board uses 6 Sig-- ;: 

* netics ^551 r Jsarts wnicn nave on-cnip baud* 

* rate generators. v 



' j« »!» »,» *,« #|« »,* » ( « »,C »j* »j* r,« * ( « *,» a-|« »|« « 



•i" J,C *,i 'fi V •»• »i> »t" 



• *l» *t* *•' *»» 



> I 



mov al,£FFh 

out oic_reset,ai ;reset an usarts on 8538 

mcv al,4En 

out ldata+2,al >set usart in async B nit ™ode 

mov ai,3En 

out idata+2,al ;set usart to 9500 baud 

mov ai»3?h 

out laata*3,ai ;enabie Tx/Rx, and set up RTS.L'TR 



» i 



ENL'IF ;not loader_bios 
IF loader bios 



z>A 






;Tnis is a BIOS for trie LOAEiR 

puss is »save data seernent 

t o v a x , { l 

mov is, ax Jpoint to segment zero 

i'EDOS interrupt offset 

idv tio s_offset , bio s_ofst 

mov bdos_segment ,CS ;cdos interrupt segment 

pop ds ^restore lata segment 



ENEIF ; loader Dios 



mov bx, offset signon 

call pms? Jprint si^non message 

mov ci.tf ^default to ir A: on constant 

jmp ccp Ijump to coil start entry of CC? 

WBOOT: jmp ccp+5 Jdirect entry to CC? at command level 

IF not ioaler_Dios 
. i i 

» I ! 

int_trap: 

cli »bioc£ interrupts 

mov ax,cs 

mcv is, ax Jget our lata segment 

mov bx, offset int_trp 

caii pnsg 

nit jnanstop 

» I ! 

> —— — — — — — — — —— — — — -. — —— — —. — —. 



ENDIi 1 



;not loader Dios 



',-* *f» *,* *(« *J* ',» i|« *,» »(* #|* ^* »,% *|« ',* *|* *j» r,» 'j» »ji »,» - ,» *[i »•,» r ( « * ( » ij» »,« *,» #|* » ,» •»,■• -f» f , » ■■, • - ,t ■ t « *f~ »,* rf* J,i » , • * ,» »; » * • »,» 



CP/M Cnaracter I/O Interface Routines * 
Console is tfsart (iS251a) on iS2C 85/12 * 
at oorts Dy/DA * 



»,» #|» *|» *^ i,« Jj* i,» *,» i^t »|* ^,5 *,-* »,* i,i ;,C »,£ *,* iji »,- J ( i 2jS pg% ? ( S wfi *,* »»* *,» i, • « ( » ii» »(• *^« i^ » ( C *|* » t % »|* »|» *,» •,» »j5 •(* #,» *,» #,» 

CONST: ^console status 

in ai , est s 

anl al t 2 

jz const_ret 

or a 1,2 5b ; return non-zero if RDA 
cons t_ret: 

ret jReceiver Data Available 



CONIN: 



cali const 



jconsole input 



tb 



jz COMN > wait for RE' A 

in ai ,caata 

and al,7fa ;read data and remove parity Dit 

ret 

CONOUT: Jconsole output 
in al, csts 

and al,l »set console status 

jz CONOUT ?wait for T£E 

mov ai f ci 

out ciata.al JTransmitter Buffer Empty 

ret Jtnen return data 

LISTOUT: Jlist device output 

IF Dic_iist 

> — — — — — — — — — — 

. i i 

> i i 

call LISTST 

jz LISTOUT jwait for printer not busy 

mov al,cl 

out ldata,ai Jsend cnar to TI SliJ 

• i i 

• 

ENPIF ;olc_list 

ret 

LISTST: Jpoll list status 

IF blc_list 
• — __ _ 

• i i 

> i i 

in al.lsts 

ana ai.Bln iiooi at Dotn TxRTf and DTK 

cmp ai.em 

jnz zero ret »"eitner false, printer is Dusy 

or ai,255 Jbotn true, LPT is ready 

• i i 

> i i 

> ————————————————— — — — — 

ENEIF ;oic_list 

ret 

PUNCH: »'not implemented in tnis configuration 
READER: 

mov al,Ian 

ret ; return 30F for now 

OETIOBF: 

mov al,0 JTTY: for consistency 

£6 



ret 



S2TIUBF: 

ret 

zero_ret : 

aril al,0 
ret 



JIDEiTS not implemented 
Jiobyte not implemented 

; re turn zero in AL ana flags 



>" Routine to get and. ecno a console cnaracter 
; and saift it to upper case 



uconecno: 

call CON1N 

pusn ax 

mov cl , al 

call CONOCT 

pop ax 

cmp al , 'a ' 

j b uret 

cmp ai,'z' 

ja uret 

sub ai , 'a '-'a 

ret 



iget a console cnaracter 

>save and 

Jecno to console 



Jiess tnan 'a' is ok 



greater tnan 'z is ok 
;eise snift to caps 



uret : 



utility subroutine to print messages 



pmsg: 



mov al, (EX] 
test al ,ai 
jz return 
v ov CL,AL 
call CONOQT 
inc EX 
jmps pms? 



j^et next cnar from message 

»if zero return 

Jprint it 

;next cnaracter and loop 



?!» 3i* »JC 5^C 5,X JJC JJC 3JC Z£ *?» 3J% ^C 3JC 7JS *|C 3JC 3J? ?JC 3,4 JJ» ^» ^ ?JC 7jC ?JS 5J^ 3p ?JC JJ5 ?J! »J5 J*,* SJC *",» ?j! Jp JJC J^ *,£ ?|C ^C J|» £',* #p 2,4 



risfc Input/Output Routines 






^,i V 'l« '.' V *1 J ^ v ^ v : 



SELDSK.: ^select diss ffiven by register CI 
mov bx, tftftf&n 

Jtnis BIOS only supports 'd disss 

>" re turn * / icUK'c in EX if tad drive 



cpp cl ,2 
jnD return 
mov al, S n 
cmp cl , 
jne sell 
mov al , 40n 



; drive 1 if not zero 
>else drive is 



b7 



sell: mov sel_masx,al jsave drive select mastc 

»oow t we need dissc parameter address 

nov ca,0 

wov bx,cx ;3X = worl(CL) 

mov ci , 4 

sill bx,ci » multiply drive cole v 16 

fcraate offset from Diss Parameter Base 

add bx, offset dp_oase 
return: 

ret 

HOME: Inove selected disff to nome position (Tracs 0) 
mov trft,0 »set diss i/o to trac* zero 
mov bx, offset r.om_com 
call execute 

jz return ;nome drive and return if OK 
mov bx, offset bai^nom Jsise print 
call pmse >**Home Error" 
jmps nome Jand retry 

SETTRK: ?set tracK address e-iven by CX 

mov trtr,cl Jwe only use 8 bits of tracir address 

ret 

SETSEC: > set sector number ^iven by ex 

mov sect.cl Jwe only use 9 bits of sector address 

ret 

SECTRAN: ,'translate sector CX using table at [DIJ 
mov bx , ex 

add bx,dx Jadd sector to tran table address 

mov bi f [oxJ Jget logical sector 

ret 

SETDMA: Jset DMA offset eiven by CX 
mov dna_adr,CX 
ret 

SSTDMA2: ?set DMA segment given by CX 

mov dma_se?,CX 

ret 
t 
G-ETSEGT: ^return address of physical memory table 

mov bx, offset se^_tabie 

ret 



* All diss I/O parameters are setup: tne * 

* Read anl ^rite entry points transfer one * 

* sector of 123 bytes to/from tne current * 



» DMA address using trie current diss drive ~- f 

''fi *i* V ^ *i» '? *£ *i- V •«* *» 5 *£ J ? *i* -»» '? V Ji* *r *r 'J* *i» nC 5£ S? *i* J^C ftjC 5",C Xfi ^S SJ« 5? ^S 9QG 5? 3QS J? 5£ 7fi J? 5JS SgC 3^ Z£ 



R2A.D: 



4 HITS: 



nov ai f i2n jbasic read sector command 
jmps r_w_common 



mo v al,i"an 



> basic write sector command 



r_w_con7ion : 

mov bx, offset io_com jpoint to command string 
mov byte otr l[EXJ,al ;?ut command into string- 

; fail into execute and return 

execute: Jexecute command string. 
; [3ZJ points to iengtn, 
; followed by Command byte, 
> followed by ieneth-1 parameter bytes 



mov iast_com t 37. ;save command address for retries 
outer_retry : 

; allow some retrying 
mov rtry_cnt ,max_re tries 



retry: 



mov BX , last_com 

call send_com Jtransmit command to i827l 

cbecK status poll 



mov bl f iast_com 
mov al , 1 [oxj 
mov cx^B^kn 
cmp ai,2cn 
jb exec _p oil 
mov cx,808#n 
and al t 0fn 
cmp al,i?cn 
mov al.£ 
ja exec_exit 



exec_poll : 



Jget command op code,, 

JmasK if it will be "int req" 

J ok if it is an interrupt type,, 
Jelse we use "not command busy" 

J unless tnere isn't 

»* any result 

; p o i l for bits in C E , 

; tolled toitn bits in CL 



in ai,fdc_stat Jread status 
and al,cn 
xor al.ol 
jz exec_poll 



; isolate wnat we want to poll 
;and looo until ic is done 



in al,fdc_rslt 
and ai f ien 



jOperation complete, 

» see if result code indicates error 



sy 



jz exec_exit 

cup ai,i0ri 

je dr_nrdy 



Jno error, tnen exit 

»some type of error occurred . . . 



Jwas it a not ready drive ? 

J no, 
dr_rdy: ; tnen we just retry read, or write 
dec rtry_cnt 
jnz retry ; up to 10 tires 

; retries lo not recover from tne 

; nan error 



mov a n » 

mov bx , ax Jmase error cone 16 bits 

mov bx ,errt bi [2XJ 

call pms? Jprint appropriate messa*? c 

in al,cdata Jflusn usart receiver buffer 

call uconecno ireaa upper case console character 

cmp al , 'C ' 

je wboot_l ; cancel 

cmp al , 'P. ' 

je outer_retry Jretry 10 more times 



cmp al, I 
je z_ret 
or a 1 ,255 

exec_exi t : 
ret 



^ignore error 

Jset cole for Derma nent error 



ir_nrdy: jrere to wait for drive ready 

call test_ready 

jnz retry Jif it's ready now we are dene 

call test_ready 

jnz retry >if not ready twice in "ow, 

mov Dx.cffsgt nrdymsg 
call pms? >' Drive Not Ready" 



nrdy^l: 



zret : 



call test_ready 

jz nrd/01 Jnow loop until drive ready 

jmps retry Jtnen ^o retry witnout decrement 



and al,kJ 

ret 



w b o o t 1 : 



jmp WBOOT 



J return witn no error code 

; can't mate it w/ a snort leap 



*i**i* *i» Xfi +p Jf» *j» 5|5 3f* 3J5 *y* *i* •■* *it* *o ni* *(* n* *f* *i* *p *!* *9* *i* *i* *i^ ^i* *<* 1* *"»* *i* *T* *? *p *i* *(* *(* 1* *8* •■* *f* *r* *t* •■* ^* 

* Tne iB271 requires a read status command * 

* to reset a drive-not-ready after tne * 
v - drive becomes ready * 



90 



;" <[i ;x ;,» ^* ~~'f. *>£ \\ >p , - -;c ;,^ ;,£ ;,i pjc ;;s ?;» r^s ?£ ^s ?jc 5^ 3QC ^ 3£ J^t 99c 5jc ?i» ?£ Jjs 3jS 5jft ?,? 5,; ;,i xfi x t z ;,< x,i ;,c ^ 5,5 *i* ?£ 



tes t_ready : 

mov d ft , 40 ft » proper mass it d r 1 
test sel_mas£,80ft 

jr.z r.rly2 

"nov dft, 04ft J^asK for dr status bit 

nrdy2: 

ncv ox, offset rds_com 
"all send con 



dr_poll : 



in al,fdc_stat iget status won 

test al ,80ft 

jnz dr_poll »wait for not command cusy 

in al,fdc_rslt »get "special result" 

test al ,dft JIook at bit for tnis drive 

ret Jreturn status of ready 



;,; -^ i^ v ^ v i|J ;? v v '** - »* V *i* - 1" -1* *? *»» -•* *-«- V V ; . ; -".» ; .* V - 1* V ; i* *.* *i* i,s ;,£ •'* *«- -V *» ; *. ; ^ ; * 1- - ■• * .» *•* *i* *•* 

^ =? 

* Send_com sends a command and uarameters * 

* to tne i8271: BX addresses parameters. v 

* Tfte DMA controller is also initialized * 

* if tnis is a read or write * 






send_com: 

in al t fdc_stat 

test al,S0n ; insure command not busy 

jnz send_com Jloop until ready 

,*see if we nave to initialize for a DMA operation 

mov al t l[bxj J^et command bvte 

cmp ai,i2n 

jne write_maybe Jif not a read it could be write 

mov cl,40n 

jmps init_ima »is a read command, go set DMA 
wri te_may be: 

cmp ai f 0an 

jne dma_exit Jleave DMA alone if not read or write 

mov cl,80fl ?we nave write, no: read 
init_dma: 

Jwe nave a read or write operation, setup DMA controller 
; (CL contains proper direction bit) 

mov ai,04n 

out dmac_mode,al Jenable dmac 

mov ai,00 

out dmac ccnt.al ;send first byte to control port 



91 



load direction register 
send lew byte of r v1 A 
send aigh byte 

send low byte of segment address 
tnen tiiffh seement address 
»t count 



mov a 1 , c 1 

out dmac_cont ,al 

mov ax , dma_alr 

out dmac_air f al 

Tio v al, an 

out dmac_adr,al 

fnov ax,dma_se? 

out flc__segment ,ai 

Tiov al , an 

out ?d.c_seement ,al 
d^ia_exi t : 

mov cl, [BXJ 

i nc -B5C 

mov al,[3XJ >get command 

or al,sei_mastc Jmerge command and drive code 

out fdc_com,al jsend command Dyte 
parm_loop: 

dec cl 

jz exec_exit 

inc EX 
pam_poll : 

in al,fdc_stat 

test al ,20n 

jnz parm_poil 

mov al ♦ [EX] 

out fic_parm t al Jsend next parameter 

jmps parm_loop Jgo see if tnere are more parameters 



Jno (more) parameters, return 
ipoint to (next) narameter 



Jtest parameter register full bit 
»ille until pa rm reg not full 



-'- Data Areas i>: 

Z£ Tf. ;x ;,; Z,i Xfi ; £ ^ X£ x£ X£ V 7£. *£ sp ;£ i,c sp zp ^t s^ j^ ^x z$ xfi z$ 3^ ^s ;,: ^ jp ^z j;; ;^3^s;;2^j^^?*c;xrx;,i ;,-;;,; 

data offset equ offset S 



ds e? 
or? 

IF 



data_of fset 
loader oios 



. i 

signon db 

db 
. i 

» i 

» — — — ____ _____ 

ENDII Jloader bios 



^contiguous witn cole segment 



cr, if ,cr,lf 

'CF/Y-fc6 7ersion 2.2',cr,lf,0 



IF 
signon db 



» 

• i 
» i 



not loader bios 



cr,if ,cr,l 



92 



db 



System Seneratec - 11 Jan 8l',cr,lf,0 



t i 



E.MDIF J not loaler Dios 



bad_nom d b 
int_trp db 



cr» li' , 'Home Error',cr,lf ,0 

cr , if , 'Interrupt Trap Halt' ,cr,lf ,0 



errt bl 



er0 
erl 
er2 
er3 
erl 
erb 
er5 
er7 
e rB 
er9 
erA. 
er3 
erC 
erD 
erE 
erF 
nriymsg 



dw er0,erl ,er2,er3 

dw e r4,er5 ,er6 t er? 
dw er9 ,er9 ,erA,erS 
dw e rC, erD ,erE , erF 

db cr, If, 'Null Error ??',0 
equ er0 
equ er0 
equ sr0 

db 

db 
db 
ib 
db 
db 
db 
db 
db 
eau 



cr,lf,'ClocK Error : ' , 
cr. If ♦ 'Late D^A : ',0 
cr, if , 'ID CRC Error : ',0 
cr, If, 'Data CRC Error :',0 
cr, if, 'Drive Not Heady :',0 
cr, if, 'Write Protect :',0 
or, if, 'Trie 00 Not Found :',0 
cr, If , 'Write Fault : ' ,0 
cr, if , 'Sector Mot Found :',0 
er£ 



equ er0 
eau er0 

equ erS 



rtry_cnt db 

last_com dw 2 

dma_adr dw 

dna seg dw 



Jdisi error retry counter 
Jaddress of last command string 
jdma offset stored nere 
;dma segment stored nere 



sel masK: db 4Zh Jseiect masx, 40n or Sfc)ft 



; Various command strings for 13271 

io_com db 3 ; len^tn 

rd~vr db >*read/write function code 

trie db ; tracic # 

sect db Jsector n 



nom_com db 2,29n,0 
rds_com db 1 ,Hcn 



jnome drive command 
Jread status command 



System v emory Segment Table 



segtable db 2 ; 2 segments 



dw toa se" 



;ist see starts after 3I0S 



93 



dw tpa_ien 
dw 2000n 
iw 2 00 0n 



fand extends to U8£Qit 
;second is 20000 - 
J3FFJF (l26fc) 



include singles. lie ;read in disic definitions 

ioc_stK rw 32 Jiocal stacfc for initialization 
sttDase equ offset s 

lastoff equ offset 5 

tpa_se? eau ( last of f +04:00n + l5 , i / lb 

tpa_len equ 0300a - tpa_ser 

db ;t'iil last address for SENCMD 



rp.l£ %C S£ Xfi J£ ^t & ^t ^C Jp 3^ tC Z£ V^ 5 ^? n* V ^ ^ -S^ *i* *? 'i : ^ ^ V ^* ^ ; >* ^ 'I* ; > ^r ^^ '.i i? ^r *? ~ ^ ^ •"? 

* Dummy Data Section * 

^^ ~ ^ ^ ^P ^ ^ *£ ^ 3 £ 2,S2£ %£ ^^ ^ ^? n^ ^ ^ 3£ ?,! ^ J^ 2£ ^S ^X >fiZyi S£ r^ 3£ r,r ^t 7,*7Z ^X ;,*S;S ^i -o n c ^* 'i* 

dseg {absolute low memory 

or? {(interrupt vectors) 

int0_offset rw 1 

int2_segment rw 1 

i pad to system call vector 

rw 2' ;t (bdos int-l) 



bdos_offset rw 
blos_ses , ment rw 
END 



1 

1 



94 



LIST OF REFERENCES 



1. 



2. 



Xiliall, «., " CP/^: A Family of 6- and 15-Bit 
Operating Systems , Byte, v. 6 , p. 216-232, June 1981. 

Digital Researcn, ASM-66 THE GP/^S6 ASSEMBLER USER'S 
GUIDE, 1961. 



3. Digital Researcn, DDT-66 Dynamic Drugging Tool fc: tn 
6066 USER'S GUIDE, 1961. 



4. Digital Researcn, AN INTRODUCTION TO CP/ M FEATURES IND 
FACILITIES , 1981. 

5. Digital Researcn, CP/M 2.2 USER'S GUIDE , 1979. 

6. Digital Researcn, CP/M-66 SYSTEM REFERENCE GUIDE , 1961. 

7. Intel Corporation, MDS-DUS HARDWARE REFERENCE MANUAL , 
1976. 

8. Intel Corporation, INTELLBC DOULLE DENSITY DISKETTE 
OPERATING SYSTEM REFERENCE MANUAL , 1977. 

9. EX-CELL-0 Corporation, REMEX TECHNICAL MANUAL MULTIBUS 
INTERFACE ASS? 6144:15-001 , 1980. 

10. EX-CELL-0 Corporation, REMEX TECHNICAL MANUAL DISKETTE 
DRIVE MODELS: RED 4000-A, RED 4001-A, RED 2^00-4 , 

RFD 2201 -A . 1979T 

11. SX-CELL-0 Corporation, REMEX TECHNICAL MANUAL DATA 
WAREHOUSE MODELS RDW 3100, 3Drf 3200 . 1979. 



95 



INITI.1L DISTRIBUTION LIST 



No. Co Tries 



1. Defense Tecnnical Information Center 
Cameron Station 

Alexandria, Virginia 22314 

2. Library, Code 0142 

Naval Postgraduate Scnool 
Monterey, California 93940 

3. Deoartment Cftairman, Code 52 
Deoartment of Computer Science 
Naval Postgraduate Scnool 
Monterey, California 33940 



2 



4. Associate Professor (Jno R. Kodres, 
Department of Computer Science 
Naval Postgraduate Scnool 
Monterey, California 93940 



Code 52Kr 



5. LCD?. Robert Stilwell, SC, USN, Code 52S d 
Department of Computer Science 

Naval Postgraduate Scnool 
Monterey, California 93940 

6. Professor Rudy Pannolzer, Code 52Pz 
Department of Electrical Engineering 
Naval Postgraduate Scnool 
Monterey, California 93940 

?. Associate Professor Mitcnell L. Cotton, Coae 62C: 
Department of Electrical Engineering 
Naval postgraduate Scnool 
Monterey, California 93940 

9. Daniel C-reen, Code N-202 
Naval Weapons Center 

Danlgren, Virginia 22449 

9. PMS 400 

Naval Sea Systems Command 
Wasnington, D.C. 20362 
Attn: CDR Ruff 

1?. Commander, Ampnifciou? Suuadron Five 
FPO San Francisco, Ca . 96601 
Attn: LCDR Michael B. Candalor, USN 



96 



^93^ 



57 



Thesis 
C19li25 
c.l 




Thesis 

C19^5 
c.l 



193757 

Candalor 

Alteration of the 
CP/M-86 operating 
system. 



«AA 25 «5 ? 

23 OCT 8S 

23 J 



3227U 

2 1301 



193757 



Candalor 

Alteration of the 
CP/M-86 operating 
system. 



thesC 19425 

Alteration of the CP/M-86 operating syst 




3 2768 002 08484 

DUDLEY KNOX LIBRARY